davinci: Add watchdog base address flexibility

The watchdog code currently hardcodes the base address
of the timer its using.  To support new SoCs, make it
support timers at any address.  Use the soc_info structure
to do this.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 36c528ff30f9586b08d33091bda052b8330ce127..7ebf6713f6a2b5b2c9a610ddfc852abb3ea1bdd1 100644 (file)
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -216,8 +216,6 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
 
 static struct resource wdt_resources[] = {
        {
-               .start  = 0x01c21c00,
-               .end    = 0x01c21fff,
                .flags  = IORESOURCE_MEM,
        },
 };
@@ -231,6 +229,11 @@ struct platform_device davinci_wdt_device = {
 
 static void davinci_init_wdt(void)
 {
+       struct davinci_soc_info *soc_info = &davinci_soc_info;
+
+       wdt_resources[0].start = (resource_size_t)soc_info->wdt_base;
+       wdt_resources[0].end = (resource_size_t)soc_info->wdt_base + SZ_1K - 1;
+
        platform_device_register(&davinci_wdt_device);
 }
 

diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 293a419a4a8e1caeb84b32741814d53c706fbd05..1b7c16cd2672cb3d229ba2e1e12b0ef75250bfcb 100644 (file)
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -646,6 +646,7 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
        .intc_irq_prios         = dm355_default_priorities,
        .intc_irq_num           = DAVINCI_N_AINTC_IRQ,
        .timer_info             = &dm355_timer_info,
+       .wdt_base               = IO_ADDRESS(DAVINCI_WDOG_BASE),
 };
 
 void __init dm355_init(void)

diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 8e9385c3485325481b4bb5125907c59a3ca79a45..c66269264cca3029cea7e6039056ec9d7ed8af50 100644 (file)
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -589,6 +589,7 @@ static struct davinci_soc_info davinci_soc_info_dm644x = {
        .intc_irq_prios         = dm644x_default_priorities,
        .intc_irq_num           = DAVINCI_N_AINTC_IRQ,
        .timer_info             = &dm644x_timer_info,
+       .wdt_base               = IO_ADDRESS(DAVINCI_WDOG_BASE),
 };
 
 void __init dm644x_init(void)

diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 219063f4d000e6c12058bbfcc4bfe02ba31f04b5..83d67cf6935f9ab440fefd5404d927675e273b02 100644 (file)
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -568,6 +568,7 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
        .intc_irq_prios         = dm646x_default_priorities,
        .intc_irq_num           = DAVINCI_N_AINTC_IRQ,
        .timer_info             = &dm646x_timer_info,
+       .wdt_base               = IO_ADDRESS(DAVINCI_WDOG_BASE),
 };
 
 void __init dm646x_init(void)

diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 90b43be1174e57ea4b132365a7f1a1fddc43f1b0..d63703826a6015f6d6fd6dccebc5d8d49ff69448 100644 (file)
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -57,6 +57,7 @@ struct davinci_soc_info {
        u8                              *intc_irq_prios;
        unsigned long                   intc_irq_num;
        struct davinci_timer_info       *timer_info;
+       void __iomem                    *wdt_base;
 };
 
 extern struct davinci_soc_info davinci_soc_info;

diff --git a/arch/arm/mach-davinci/include/mach/time.h b/arch/arm/mach-davinci/include/mach/time.h
index 1428d77c989e4798ae981a294ed64ed4496ce996..1c971d8d8ba8219e7f6e061a85627486cc727c71 100644 (file)
--- a/arch/arm/mach-davinci/include/mach/time.h
+++ b/arch/arm/mach-davinci/include/mach/time.h
@@ -13,6 +13,7 @@
 
 #define DAVINCI_TIMER0_BASE            (IO_PHYS + 0x21400)
 #define DAVINCI_TIMER1_BASE            (IO_PHYS + 0x21800)
+#define DAVINCI_WDOG_BASE              (IO_PHYS + 0x21C00)
 
 enum {
        T0_BOT,

diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index faafb897f4bd5a97cb878e540febb150cda9f21e..f80ae25a52e4c519efb9f48ec66574c068f37088 100644 (file)
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -35,8 +35,6 @@
 static struct clock_event_device clockevent_davinci;
 static unsigned int davinci_clock_tick_rate;
 
-#define DAVINCI_WDOG_BASE   (IO_PHYS + 0x21C00)
-
 /*
  * This driver configures the 2 64-bit count-up timers as 4 independent
  * 32-bit count-up timers used as follows:
@@ -343,7 +341,8 @@ struct sys_timer davinci_timer = {
 void davinci_watchdog_reset(void)
 {
        u32 tgcr, wdtcr;
-       void __iomem *base = IO_ADDRESS(DAVINCI_WDOG_BASE);
+       struct davinci_soc_info *soc_info = &davinci_soc_info;
+       void __iomem *base = soc_info->wdt_base;
        struct clk *wd_clk;
 
        wd_clk = clk_get(&davinci_wdt_device.dev, NULL);