drm/i915: Don't bypass LRC on CHV
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 8 Sep 2015 15:05:44 +0000 (18:05 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 6 Oct 2015 08:29:19 +0000 (10:29 +0200)
The docs are unclear as usual, so it's not clear whether LRC should be
bypassed, performed normally or GRC code should be used as the LRC code.
Some old docs stated that LRC bypass ought to be used, more recent ones
no longer say that. Some docs indicated that we could use GRC as the LRC
code on CHV, but the BIOS doesn't do that, so let's not do it either.

Besides to enable LRC bypass properly, I believe we should set the bit
already before deasserting cmnreset.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Deepak S<deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_hdmi.c

index 97ed418060fffc2a813039d2028b445d97b42a92..19cbc2ef542cb043b5d7fe0cb9bc347ce178a49e 100644 (file)
@@ -3417,11 +3417,6 @@ static uint32_t chv_signal_levels(struct intel_dp *intel_dp)
                vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW10(ch), val);
        }
 
-       /* LRC Bypass */
-       val = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW30);
-       val |= DPIO_LRC_BYPASS;
-       vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW30, val);
-
        mutex_unlock(&dev_priv->sb_lock);
 
        return 0;
index 3c5f2c92218096ca2ef58c774b63717f31814525..3b28ed3237d3546864d803a911b4307588c136da 100644 (file)
@@ -1952,11 +1952,6 @@ static void chv_hdmi_pre_enable(struct intel_encoder *encoder)
        val |= DPIO_PCS_SWING_CALC_TX0_TX2 | DPIO_PCS_SWING_CALC_TX1_TX3;
        vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW10(ch), val);
 
-       /* LRC Bypass */
-       val = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW30);
-       val |= DPIO_LRC_BYPASS;
-       vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW30, val);
-
        mutex_unlock(&dev_priv->sb_lock);
 
        intel_hdmi->set_infoframes(&encoder->base,