--- /dev/null
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.32.27
+# Tue Mar 1 11:15:10 2011
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_ARCH_HAS_CPUFREQ=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+# CONFIG_SYSVIPC is not set
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_RT_GROUP_SCHED=y
+# CONFIG_USER_SCHED is not set
+CONFIG_CGROUP_SCHED=y
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_DEBUG=y
+# CONFIG_CGROUP_NS is not set
+CONFIG_CGROUP_FREEZER=y
+# CONFIG_CGROUP_DEVICE is not set
+# CONFIG_CPUSETS is not set
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+# CONFIG_CGROUP_MEM_RES_CTLR is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_PANIC_TIMEOUT=5
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_ELF_CORE is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_ASHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_RK2818 is not set
+CONFIG_ARCH_RK29=y
+CONFIG_WIFI_CONTROL_FUNC=y
+# CONFIG_MACH_RK29SDK is not set
+# CONFIG_MACH_RK29WINACCORD is not set
+CONFIG_MACH_RK29FIH=y
+# CONFIG_MACH_RK29_AIGO is not set
+# CONFIG_MACH_RK29_MALATA is not set
+# CONFIG_MACH_RK29_PHONESDK is not set
+CONFIG_RK29_MEM_SIZE_M=512
+
+#
+# RK29 VPU (Video Processing Unit) support
+#
+CONFIG_RK29_VPU=y
+# CONFIG_RK29_VPU_DEBUG is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+CONFIG_ARM_THUMBEE=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_HAS_TLS_REG=y
+CONFIG_ARM_L1_CACHE_SHIFT=6
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_ARM_GIC=y
+CONFIG_PL330=y
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# CPU Power Management
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+CONFIG_NEON=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_HAS_WAKELOCK=y
+CONFIG_HAS_EARLYSUSPEND=y
+CONFIG_WAKELOCK=y
+CONFIG_WAKELOCK_STAT=y
+CONFIG_USER_WAKELOCK=y
+CONFIG_EARLYSUSPEND=y
+# CONFIG_NO_USER_SPACE_SCREEN_ACCESS_CONTROL is not set
+CONFIG_CONSOLE_EARLYSUSPEND=y
+# CONFIG_FB_EARLYSUSPEND is not set
+# CONFIG_APM_EMULATION is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+CONFIG_ANDROID_PARANOID_NETWORK=y
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=y
+CONFIG_BT_L2CAP=y
+CONFIG_BT_SCO=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+# CONFIG_BT_BNEP is not set
+# CONFIG_BT_HIDP is not set
+
+#
+# Bluetooth device drivers
+#
+# CONFIG_BT_HCIBTUSB is not set
+# CONFIG_BT_HCIBTSDIO is not set
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+# CONFIG_BT_HCIUART_BCSP is not set
+# CONFIG_BT_HCIUART_LL is not set
+# CONFIG_BT_HCIBCM203X is not set
+# CONFIG_BT_HCIBPA10X is not set
+# CONFIG_BT_HCIBFUSB is not set
+# CONFIG_BT_HCIVHCI is not set
+# CONFIG_BT_MRVL is not set
+CONFIG_BT_HCIBCM4325=y
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_LIB80211 is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
+
+#
+# Some wireless drivers require a rate control algorithm
+#
+# CONFIG_WIMAX is not set
+CONFIG_RFKILL=y
+# CONFIG_RFKILL_PM is not set
+# CONFIG_RFKILL_INPUT is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH=""
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND is not set
+CONFIG_MTD_RKNAND=y
+CONFIG_MTD_NAND_RK29XX=y
+CONFIG_RKFTL_PAGECACHE_SIZE=64
+CONFIG_MTD_RKNAND_BUFFER=y
+# CONFIG_MTD_NAND_RK29XX_DEBUG is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+CONFIG_MISC_DEVICES=y
+CONFIG_ANDROID_PMEM=y
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_KERNEL_DEBUGGER_CORE is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_UID_STAT is not set
+# CONFIG_WL127X_RFKILL is not set
+CONFIG_APANIC=y
+CONFIG_APANIC_PLABEL="kpanic"
+# CONFIG_STE is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_RK29_SUPPORT_MODEM is not set
+CONFIG_RK29_GPS=y
+CONFIG_GPS_GNS7560=y
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+CONFIG_MD=y
+# CONFIG_BLK_DEV_MD is not set
+CONFIG_BLK_DEV_DM=y
+# CONFIG_DM_DEBUG is not set
+CONFIG_DM_CRYPT=y
+# CONFIG_DM_SNAPSHOT is not set
+# CONFIG_DM_MIRROR is not set
+# CONFIG_DM_ZERO is not set
+# CONFIG_DM_MULTIPATH is not set
+# CONFIG_DM_DELAY is not set
+CONFIG_DM_UEVENT=y
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+CONFIG_RK29_VMAC=y
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN=y
+CONFIG_WLAN_80211=y
+# CONFIG_WIFI_NONE is not set
+CONFIG_BCM4329=y
+# CONFIG_MV8686 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_HSO is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+CONFIG_INPUT_KEYRESET=y
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYS_RK29=y
+# CONFIG_SYNAPTICS_SO340010 is not set
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_WM831X_GPIO is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_XPT2046_SPI_NOCHOOSE=y
+# CONFIG_TOUCHSCREEN_XPT2046_SPI is not set
+# CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI is not set
+# CONFIG_TOUCHSCREEN_XPT2046_320X480_SPI is not set
+# CONFIG_TOUCHSCREEN_XPT2046_320X480_CBN_SPI is not set
+# CONFIG_TOUCHSCREEN_IT7250 is not set
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+# CONFIG_HANNSTAR_P1003 is not set
+# CONFIG_SINTEK_3FA16 is not set
+CONFIG_EETI_EGALAX=y
+CONFIG_EETI_EGALAX_MAX_X=1087
+CONFIG_EETI_EGALAX_MAX_Y=800
+# CONFIG_EETI_EGALAX_DEBUG is not set
+# CONFIG_TOUCHSCREEN_IT7260 is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_PSENSOR_ISL29028 is not set
+# CONFIG_INPUT_LPSENSOR_CM3602 is not set
+CONFIG_INPUT_LSENSOR_CM3623=y
+CONFIG_INPUT_MPU3050=y
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYCHORD is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+# CONFIG_INPUT_TPS65910_PWRBUTTON is not set
+# CONFIG_INPUT_UINPUT is not set
+# CONFIG_INPUT_GPIO is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+CONFIG_G_SENSOR_DEVICE=y
+# CONFIG_GS_MMA7660 is not set
+# CONFIG_GS_MMA8452 is not set
+CONFIG_GS_FIH=y
+# CONFIG_INPUT_JOGBALL is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVMEM=y
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_SERIAL_RK29=y
+CONFIG_UART0_RK29=y
+CONFIG_UART0_CTS_RTS_RK29=y
+CONFIG_UART1_RK29=y
+CONFIG_UART2_RK29=y
+CONFIG_UART2_CTS_RTS_RK29=y
+# CONFIG_UART3_RK29 is not set
+CONFIG_SERIAL_RK29_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_DCC_TTY is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+# CONFIG_I2C_CHARDEV is not set
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+CONFIG_I2C_RK29=y
+
+#
+# Now, there are four I2C interfaces selected by developer.
+#
+CONFIG_I2C0_RK29=y
+CONFIG_I2C1_RK29=y
+CONFIG_I2C2_RK29=y
+CONFIG_I2C3_RK29=y
+# CONFIG_I2C_DEV_RK29 is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_SENSORS_PCA963X is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_ADC=y
+# CONFIG_ADC_RK28 is not set
+CONFIG_ADC_RK29=y
+# CONFIG_SPI_FPGA is not set
+# CONFIG_HEADSET_DET is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_TPS65910 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_GPIO_PCA9554 is not set
+# CONFIG_IOEXTEND_TCA6424 is not set
+CONFIG_EXPANDED_GPIO_NUM=0
+CONFIG_EXPANDED_GPIO_IRQ_NUM=0
+# CONFIG_EXPAND_GPIO_SOFT_INTERRUPT is not set
+CONFIG_SPI_FPGA_GPIO_NUM=96
+CONFIG_SPI_FPGA_GPIO_IRQ_NUM=16
+# CONFIG_W1 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PDA_POWER is not set
+# CONFIG_BATTERY_DS2760 is not set
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_BQ27x00 is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_BATTERY_STC3100 is not set
+CONFIG_BATTERY_BQ27510=y
+# CONFIG_BATTERY_BQ3060 is not set
+# CONFIG_CHECK_BATT_CAPACITY is not set
+CONFIG_NO_BATTERY_IC=y
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+CONFIG_TPS65910_CORE=y
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X_I2C is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
+CONFIG_REGULATOR=y
+# CONFIG_REGULATOR_DEBUG is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+CONFIG_REGULATOR_TPS65910=y
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+# CONFIG_RK2818_REGULATOR_CHARGE is not set
+# CONFIG_RK2818_REGULATOR_LP8725 is not set
+# CONFIG_RK29_PWM_REGULATOR is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+CONFIG_VIDEO_ALLOW_V4L1=y
+CONFIG_VIDEO_V4L1_COMPAT=y
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=y
+
+#
+# Multimedia drivers
+#
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=y
+CONFIG_MEDIA_TUNER_TDA8290=y
+CONFIG_MEDIA_TUNER_TDA9887=y
+CONFIG_MEDIA_TUNER_TEA5761=y
+CONFIG_MEDIA_TUNER_TEA5767=y
+CONFIG_MEDIA_TUNER_MT20XX=y
+CONFIG_MEDIA_TUNER_XC2028=y
+CONFIG_MEDIA_TUNER_XC5000=y
+CONFIG_MEDIA_TUNER_MC44S803=y
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEO_V4L1=y
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_VIDEOBUF_DMA_CONTIG=y
+# CONFIG_VIDEO_RK29XX_VOUT is not set
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
+# CONFIG_VIDEO_VIVI is not set
+# CONFIG_VIDEO_CPIA is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_VIDEO_SAA5246A is not set
+# CONFIG_VIDEO_SAA5249 is not set
+CONFIG_SOC_CAMERA=y
+# CONFIG_SOC_CAMERA_MT9M001 is not set
+# CONFIG_SOC_CAMERA_MT9M111 is not set
+# CONFIG_SOC_CAMERA_MT9T031 is not set
+# CONFIG_SOC_CAMERA_MT9P111 is not set
+# CONFIG_SOC_CAMERA_MT9D112 is not set
+# CONFIG_SOC_CAMERA_MT9V022 is not set
+# CONFIG_SOC_CAMERA_TW9910 is not set
+# CONFIG_SOC_CAMERA_PLATFORM is not set
+# CONFIG_SOC_CAMERA_OV772X is not set
+# CONFIG_SOC_CAMERA_OV7675 is not set
+# CONFIG_SOC_CAMERA_OV2655 is not set
+# CONFIG_SOC_CAMERA_OV2659 is not set
+# CONFIG_SOC_CAMERA_OV9650 is not set
+# CONFIG_SOC_CAMERA_OV3640 is not set
+# CONFIG_SOC_CAMERA_OV5642 is not set
+# CONFIG_SOC_CAMERA_OV5640 is not set
+# CONFIG_SOC_CAMERA_S5K6AA is not set
+# CONFIG_VIDEO_SH_MOBILE_CEU is not set
+CONFIG_VIDEO_RK29=y
+CONFIG_VIDEO_RK29_WORK_ONEFRAME=y
+# CONFIG_VIDEO_RK29_WORK_PINGPONG is not set
+CONFIG_VIDEO_RK29_WORK_IPP=y
+# CONFIG_VIDEO_RK29_WORK_NOT_IPP is not set
+CONFIG_V4L_USB_DRIVERS=y
+# CONFIG_USB_VIDEO_CLASS is not set
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_USB_GSPCA=m
+# CONFIG_USB_M5602 is not set
+# CONFIG_USB_STV06XX is not set
+# CONFIG_USB_GL860 is not set
+# CONFIG_USB_GSPCA_CONEX is not set
+# CONFIG_USB_GSPCA_ETOMS is not set
+# CONFIG_USB_GSPCA_FINEPIX is not set
+# CONFIG_USB_GSPCA_JEILINJ is not set
+# CONFIG_USB_GSPCA_MARS is not set
+# CONFIG_USB_GSPCA_MR97310A is not set
+# CONFIG_USB_GSPCA_OV519 is not set
+# CONFIG_USB_GSPCA_OV534 is not set
+# CONFIG_USB_GSPCA_PAC207 is not set
+# CONFIG_USB_GSPCA_PAC7311 is not set
+# CONFIG_USB_GSPCA_SN9C20X is not set
+# CONFIG_USB_GSPCA_SONIXB is not set
+# CONFIG_USB_GSPCA_SONIXJ is not set
+# CONFIG_USB_GSPCA_SPCA500 is not set
+# CONFIG_USB_GSPCA_SPCA501 is not set
+# CONFIG_USB_GSPCA_SPCA505 is not set
+# CONFIG_USB_GSPCA_SPCA506 is not set
+# CONFIG_USB_GSPCA_SPCA508 is not set
+# CONFIG_USB_GSPCA_SPCA561 is not set
+# CONFIG_USB_GSPCA_SQ905 is not set
+# CONFIG_USB_GSPCA_SQ905C is not set
+# CONFIG_USB_GSPCA_STK014 is not set
+# CONFIG_USB_GSPCA_SUNPLUS is not set
+# CONFIG_USB_GSPCA_T613 is not set
+# CONFIG_USB_GSPCA_TV8532 is not set
+# CONFIG_USB_GSPCA_VC032X is not set
+# CONFIG_USB_GSPCA_ZC3XX is not set
+# CONFIG_VIDEO_PVRUSB2 is not set
+# CONFIG_VIDEO_HDPVR is not set
+# CONFIG_VIDEO_EM28XX is not set
+# CONFIG_VIDEO_CX231XX is not set
+# CONFIG_VIDEO_USBVISION is not set
+# CONFIG_USB_VICAM is not set
+# CONFIG_USB_IBMCAM is not set
+# CONFIG_USB_KONICAWC is not set
+# CONFIG_USB_QUICKCAM_MESSENGER is not set
+# CONFIG_USB_ET61X251 is not set
+# CONFIG_VIDEO_OVCAMCHIP is not set
+# CONFIG_USB_OV511 is not set
+# CONFIG_USB_SE401 is not set
+# CONFIG_USB_SN9C102 is not set
+# CONFIG_USB_STV680 is not set
+# CONFIG_USB_ZC0301 is not set
+# CONFIG_USB_PWC is not set
+CONFIG_USB_PWC_INPUT_EVDEV=y
+# CONFIG_USB_ZR364XX is not set
+# CONFIG_USB_STKWEBCAM is not set
+# CONFIG_USB_S2255 is not set
+CONFIG_RADIO_ADAPTERS=y
+# CONFIG_I2C_SI4713 is not set
+# CONFIG_RADIO_SI4713 is not set
+# CONFIG_USB_DSBR is not set
+# CONFIG_RADIO_SI470X is not set
+# CONFIG_USB_MR800 is not set
+# CONFIG_RADIO_TEA5764 is not set
+# CONFIG_SMS_SIANO_MDTV is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_RK2818 is not set
+CONFIG_FB_RK29=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_BACKLIGHT_RK29_BL=y
+
+#
+# Display device support
+#
+CONFIG_DISPLAY_SUPPORT=y
+
+#
+# Display hardware drivers
+#
+# CONFIG_LCD_NULL is not set
+# CONFIG_LCD_TD043MGEA1 is not set
+# CONFIG_LCD_HX8357 is not set
+# CONFIG_LCD_TJ048NC01CA is not set
+# CONFIG_LCD_HL070VM4AU is not set
+# CONFIG_LCD_HSD070IDW1 is not set
+CONFIG_LCD_HSD100PXN=y
+# CONFIG_LCD_B101AW06 is not set
+# CONFIG_LCD_A060SE02 is not set
+# CONFIG_LCD_S1D13521 is not set
+# CONFIG_LCD_NT35582 is not set
+# CONFIG_LCD_NT35580 is not set
+# CONFIG_LCD_ANX7150_720P is not set
+
+#
+# HDMI support
+#
+CONFIG_HDMI=y
+CONFIG_ANX7150=y
+# CONFIG_ANX9030 is not set
+# CONFIG_HDMI_DEBUG is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+# CONFIG_FONT_8x8 is not set
+CONFIG_FONT_8x16=y
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+# CONFIG_FONT_MINI_4x6 is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_RK29_SOC=y
+CONFIG_SND_RK29_SOC_I2S=y
+# CONFIG_SND_RK29_SOC_I2S_2CH is not set
+CONFIG_SND_RK29_SOC_I2S_8CH=y
+# CONFIG_SND_RK29_SOC_WM8988 is not set
+CONFIG_SND_RK29_SOC_WM8900=y
+# CONFIG_SND_RK29_CODEC_SOC_MASTER is not set
+CONFIG_SND_RK29_CODEC_SOC_SLAVE=y
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_WM8900=y
+# CONFIG_SOUND_PRIME is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+CONFIG_USB_OTG_BLACKLIST_HUB=y
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+CONFIG_USB_SERIAL=y
+# CONFIG_USB_SERIAL_CONSOLE is not set
+# CONFIG_USB_EZUSB is not set
+CONFIG_USB_SERIAL_GENERIC=y
+# CONFIG_USB_SERIAL_AIRCABLE is not set
+# CONFIG_USB_SERIAL_ARK3116 is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_CH341 is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_CP210X is not set
+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_FUNSOFT is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IPAQ is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
+# CONFIG_USB_SERIAL_GARMIN is not set
+# CONFIG_USB_SERIAL_IPW is not set
+# CONFIG_USB_SERIAL_IUU is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KLSI is not set
+# CONFIG_USB_SERIAL_KOBIL_SCT is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_MOS7720 is not set
+# CONFIG_USB_SERIAL_MOS7840 is not set
+# CONFIG_USB_SERIAL_MOTOROLA is not set
+# CONFIG_USB_SERIAL_NAVMAN is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_QUALCOMM is not set
+# CONFIG_USB_SERIAL_SPCP8X5 is not set
+# CONFIG_USB_SERIAL_HP4X is not set
+# CONFIG_USB_SERIAL_SAFE is not set
+# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
+# CONFIG_USB_SERIAL_SYMBOL is not set
+# CONFIG_USB_SERIAL_TI is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+CONFIG_USB_SERIAL_OPTION=y
+# CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_SERIAL_OPTICON is not set
+# CONFIG_USB_SERIAL_DEBUG is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+CONFIG_USB_GADGET_DWC_OTG=y
+CONFIG_USB_DWC_OTG=y
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+CONFIG_USB_ANDROID=y
+# CONFIG_USB_ANDROID_ACM is not set
+CONFIG_USB_ANDROID_ADB=y
+CONFIG_USB_ANDROID_MASS_STORAGE=y
+# CONFIG_USB_ANDROID_RNDIS is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_USB11_HOST=y
+CONFIG_USB11_HOST_EN=y
+CONFIG_USB20_HOST=y
+CONFIG_USB20_HOST_EN=y
+CONFIG_USB20_OTG=y
+# CONFIG_DWC_OTG_HOST_ONLY is not set
+CONFIG_DWC_OTG_DEVICE_ONLY=y
+CONFIG_DWC_CONN_EN=y
+# CONFIG_DWC_OTG_DEBUG is not set
+CONFIG_DWC_OTG=y
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+CONFIG_MMC_EMBEDDED_SDIO=y
+# CONFIG_MMC_PARANOID_SD_INIT is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+CONFIG_MMC_BLOCK_DEFERRED_RESUME=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_SDMMC_RK29=y
+
+#
+# Now, there are two SDMMC controllers selected, SDMMC0 and SDMMC1.
+#
+CONFIG_SDMMC0_RK29=y
+# CONFIG_EMMC_RK29 is not set
+CONFIG_SDMMC1_RK29=y
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_SWITCH=y
+CONFIG_SWITCH_GPIO=y
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+CONFIG_RTC_INTF_ALARM=y
+CONFIG_RTC_INTF_ALARM_DEV=y
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_HYM8563 is not set
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+CONFIG_RTC_DRV_TPS65910=y
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_S35392A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+CONFIG_STAGING=y
+# CONFIG_STAGING_EXCLUDE_BUILD is not set
+# CONFIG_USB_IP_COMMON is not set
+# CONFIG_PRISM2_USB is not set
+# CONFIG_ECHO is not set
+# CONFIG_COMEDI is not set
+# CONFIG_ASUS_OLED is not set
+# CONFIG_TRANZPORT is not set
+
+#
+# Android
+#
+CONFIG_ANDROID=y
+CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_ANDROID_LOGGER=y
+CONFIG_ANDROID_RAM_CONSOLE=y
+CONFIG_ANDROID_RAM_CONSOLE_ENABLE_VERBOSE=y
+CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION=y
+CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION_DATA_SIZE=128
+CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION_ECC_SIZE=16
+CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION_SYMBOL_SIZE=8
+CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION_POLYNOMIAL=0x11d
+# CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT is not set
+CONFIG_ANDROID_TIMED_OUTPUT=y
+CONFIG_ANDROID_TIMED_GPIO=y
+CONFIG_ANDROID_LOW_MEMORY_KILLER=y
+
+#
+# Qualcomm MSM Camera And Video
+#
+
+#
+# Camera Sensor Selection
+#
+# CONFIG_DST is not set
+# CONFIG_POHMELFS is not set
+# CONFIG_PLAN9AUTH is not set
+# CONFIG_LINE6_USB is not set
+# CONFIG_USB_SERIAL_QUATECH2 is not set
+# CONFIG_USB_SERIAL_QUATECH_USB2 is not set
+# CONFIG_VT6656 is not set
+# CONFIG_FB_UDL is not set
+
+#
+# RAR Register Driver
+#
+# CONFIG_RAR_REGISTER is not set
+CONFIG_IIO=y
+# CONFIG_IIO_RING_BUFFER is not set
+# CONFIG_IIO_TRIGGER is not set
+
+#
+# Accelerometers
+#
+
+#
+# Analog to digital convertors
+#
+# CONFIG_MAX1363 is not set
+
+#
+# Light sensors
+#
+# CONFIG_TSL2561 is not set
+
+#
+# Magnetometer sensors
+#
+CONFIG_SENSORS_AK8975=y
+# CONFIG_SENSORS_AK8973 is not set
+
+#
+# Triggers - standalone
+#
+
+#
+# DSP
+#
+# CONFIG_RK2818_DSP is not set
+
+#
+# RK1000 control
+#
+# CONFIG_RK1000_CONTROL is not set
+
+#
+# rk2818 POWER CONTROL
+#
+# CONFIG_RK2818_POWER is not set
+
+#
+# GPU Vivante
+#
+CONFIG_VIVANTE=y
+
+#
+# IPP
+#
+CONFIG_RK29_IPP=y
+
+#
+# CMMB
+#
+# CONFIG_CMMB is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+# CONFIG_DNOTIFY is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_YAFFS_FS=y
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
+# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
+# CONFIG_YAFFS_EMPTY_LOST_AND_FOUND is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+CONFIG_NLS_CODEPAGE_936=y
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+CONFIG_NLS_ISO8859_15=y
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_SCHEDSTATS=y
+CONFIG_TIMER_STATS=y
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+# CONFIG_DEBUG_USER is not set
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_TWOFISH_COMMON=y
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_REED_SOLOMON=y
+CONFIG_REED_SOLOMON_ENC8=y
+CONFIG_REED_SOLOMON_DEC8=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
help
Support for the ROCKCHIP Board For Rk29 Winaccord.
+config MACH_RK29FIH
+ depends on ARCH_RK29
+ bool "ROCKCHIP Board Rk29 For FIH"
+ help
+ Support for the ROCKCHIP Board For Rk29 FIH.
+
+
config MACH_RK29_AIGO
depends on ARCH_RK29
bool "ROCKCHIP Board Rk29 For Aigo"
obj-$(CONFIG_MACH_RK29WINACCORD) += board-rk29-winaccord.o board-rk29sdk-key.o
obj-$(CONFIG_MACH_RK29_AIGO) += board-rk29-aigo.o board-rk29aigo-key.o board-rk29sdk-rfkill.o
obj-$(CONFIG_MACH_RK29_MALATA) += board-malata.o board-rk29malata-key.o board-rk29sdk-rfkill.o
-obj-$(CONFIG_MACH_RK29_PHONESDK) += board-rk29-phonesdk.o board-rk29-phonesdk-key.o board-rk29-phonesdk-rfkill.o
\ No newline at end of file
+obj-$(CONFIG_MACH_RK29_PHONESDK) += board-rk29-phonesdk.o board-rk29-phonesdk-key.o board-rk29-phonesdk-rfkill.o
+obj-$(CONFIG_MACH_RK29FIH) += board-rk29-fih.o board-rk29sdk-key.o board-rk29sdk-rfkill.o
--- /dev/null
+/* arch/arm/mach-rk29/board-rk29.c
+ *
+ * Copyright (C) 2010 ROCKCHIP, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/spi/spi.h>
+#include <linux/mmc/host.h>
+#include <linux/android_pmem.h>
+#include <linux/usb/android_composite.h>
+#include <linux/i2c/tps65910.h>
+
+#include <mach/hardware.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/flash.h>
+#include <asm/hardware/gic.h>
+
+#include <mach/iomux.h>
+#include <mach/gpio.h>
+#include <mach/irqs.h>
+#include <mach/rk29_iomap.h>
+#include <mach/board.h>
+#include <mach/rk29_nand.h>
+#include <mach/rk29_camera.h> /* ddl@rock-chips.com : camera support */
+#include <media/soc_camera.h> /* ddl@rock-chips.com : camera support */
+#include <mach/vpu_mem.h>
+#include <mach/sram.h>
+
+#include <linux/regulator/rk29-pwm-regulator.h>
+#include <linux/regulator/machine.h>
+
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+
+#include "devices.h"
+#include "../../../drivers/input/touchscreen/xpt2046_cbn_ts.h"
+
+
+/* Set memory size of pmem */
+#ifdef CONFIG_RK29_MEM_SIZE_M
+#define SDRAM_SIZE (CONFIG_RK29_MEM_SIZE_M * SZ_1M)
+#else
+#define SDRAM_SIZE SZ_512M
+#endif
+#define PMEM_GPU_SIZE SZ_64M
+#define PMEM_UI_SIZE SZ_32M
+#define PMEM_VPU_SIZE SZ_64M
+#define PMEM_CAM_SIZE 0x01300000
+#ifdef CONFIG_VIDEO_RK29_WORK_IPP
+#define MEM_CAMIPP_SIZE SZ_4M
+#else
+#define MEM_CAMIPP_SIZE 0
+#endif
+#define MEM_FB_SIZE (3*SZ_2M)
+
+#define PMEM_GPU_BASE ((u32)RK29_SDRAM_PHYS + SDRAM_SIZE - PMEM_GPU_SIZE)
+#define PMEM_UI_BASE (PMEM_GPU_BASE - PMEM_UI_SIZE)
+#define PMEM_VPU_BASE (PMEM_UI_BASE - PMEM_VPU_SIZE)
+#define PMEM_CAM_BASE (PMEM_VPU_BASE - PMEM_CAM_SIZE)
+#define MEM_CAMIPP_BASE (PMEM_CAM_BASE - MEM_CAMIPP_SIZE)
+#define MEM_FB_BASE (MEM_CAMIPP_BASE - MEM_FB_SIZE)
+#define LINUX_SIZE (MEM_FB_BASE - RK29_SDRAM_PHYS)
+
+#define PREALLOC_WLAN_SEC_NUM 4
+#define PREALLOC_WLAN_BUF_NUM 160
+#define PREALLOC_WLAN_SECTION_HEADER 24
+
+#define WLAN_SECTION_SIZE_0 (PREALLOC_WLAN_BUF_NUM * 128)
+#define WLAN_SECTION_SIZE_1 (PREALLOC_WLAN_BUF_NUM * 128)
+#define WLAN_SECTION_SIZE_2 (PREALLOC_WLAN_BUF_NUM * 512)
+#define WLAN_SECTION_SIZE_3 (PREALLOC_WLAN_BUF_NUM * 1024)
+
+#define WLAN_SKB_BUF_NUM 16
+
+static struct sk_buff *wlan_static_skb[WLAN_SKB_BUF_NUM];
+
+struct wifi_mem_prealloc {
+ void *mem_ptr;
+ unsigned long size;
+};
+
+extern struct sys_timer rk29_timer;
+
+static int rk29_nand_io_init(void)
+{
+ return 0;
+}
+
+struct rk29_nand_platform_data rk29_nand_data = {
+ .width = 1, /* data bus width in bytes */
+ .hw_ecc = 1, /* hw ecc 0: soft ecc */
+ .num_flash = 1,
+ .io_init = rk29_nand_io_init,
+};
+
+#ifdef CONFIG_FB_RK29
+/*****************************************************************************************
+ * lcd devices
+ * author: zyw@rock-chips.com
+ *****************************************************************************************/
+//#ifdef CONFIG_LCD_TD043MGEA1
+#define LCD_TXD_PIN INVALID_GPIO
+#define LCD_CLK_PIN INVALID_GPIO
+#define LCD_CS_PIN INVALID_GPIO
+/*****************************************************************************************
+* frame buffe devices
+* author: zyw@rock-chips.com
+*****************************************************************************************/
+#define FB_ID 0
+#define FB_DISPLAY_ON_PIN RK29_PIN6_PD0
+#define FB_LCD_STANDBY_PIN RK29_PIN6_PD1
+#define FB_LCD_CABC_EN_PIN RK29_PIN6_PD2
+#define FB_MCU_FMK_PIN INVALID_GPIO
+
+#define FB_DISPLAY_ON_VALUE GPIO_HIGH
+#define FB_LCD_STANDBY_VALUE GPIO_HIGH
+
+//#endif
+static int rk29_lcd_io_init(void)
+{
+ int ret = 0;
+ return ret;
+}
+
+static int rk29_lcd_io_deinit(void)
+{
+ int ret = 0;
+ return ret;
+}
+
+static struct rk29lcd_info rk29_lcd_info = {
+ .txd_pin = LCD_TXD_PIN,
+ .clk_pin = LCD_CLK_PIN,
+ .cs_pin = LCD_CS_PIN,
+ .io_init = rk29_lcd_io_init,
+ .io_deinit = rk29_lcd_io_deinit,
+};
+
+
+static int rk29_fb_io_init(struct rk29_fb_setting_info *fb_setting)
+{
+ int ret = 0;
+ if(fb_setting->mcu_fmk_en && (FB_MCU_FMK_PIN != INVALID_GPIO))
+ {
+ ret = gpio_request(FB_MCU_FMK_PIN, NULL);
+ if(ret != 0)
+ {
+ gpio_free(FB_MCU_FMK_PIN);
+ printk(">>>>>> FB_MCU_FMK_PIN gpio_request err \n ");
+ }
+ gpio_direction_input(FB_MCU_FMK_PIN);
+ }
+ if(fb_setting->disp_on_en && (FB_DISPLAY_ON_PIN != INVALID_GPIO))
+ {
+ ret = gpio_request(FB_DISPLAY_ON_PIN, NULL);
+ if(ret != 0)
+ {
+ gpio_free(FB_DISPLAY_ON_PIN);
+ printk(">>>>>> FB_DISPLAY_ON_PIN gpio_request err \n ");
+ }
+ }
+
+ if(fb_setting->disp_on_en && (FB_LCD_STANDBY_PIN != INVALID_GPIO))
+ {
+ ret = gpio_request(FB_LCD_STANDBY_PIN, NULL);
+ if(ret != 0)
+ {
+ gpio_free(FB_LCD_STANDBY_PIN);
+ printk(">>>>>> FB_LCD_STANDBY_PIN gpio_request err \n ");
+ }
+ }
+
+ if(FB_LCD_CABC_EN_PIN != INVALID_GPIO)
+ {
+ ret = gpio_request(FB_LCD_CABC_EN_PIN, NULL);
+ if(ret != 0)
+ {
+ gpio_free(FB_LCD_CABC_EN_PIN);
+ printk(">>>>>> FB_LCD_CABC_EN_PIN gpio_request err \n ");
+ }
+ gpio_direction_output(FB_LCD_CABC_EN_PIN, 0);
+ gpio_set_value(FB_LCD_CABC_EN_PIN, GPIO_LOW);
+ }
+
+ return ret;
+}
+
+static struct rk29fb_info rk29_fb_info = {
+ .fb_id = FB_ID,
+ .disp_on_pin = FB_DISPLAY_ON_PIN,
+ .disp_on_value = FB_DISPLAY_ON_VALUE,
+ .standby_pin = FB_LCD_STANDBY_PIN,
+ .standby_value = FB_LCD_STANDBY_VALUE,
+ .mcu_fmk_pin = FB_MCU_FMK_PIN,
+ .lcd_info = &rk29_lcd_info,
+ .io_init = rk29_fb_io_init,
+};
+
+/* rk29 fb resource */
+static struct resource rk29_fb_resource[] = {
+ [0] = {
+ .name = "lcdc reg",
+ .start = RK29_LCDC_PHYS,
+ .end = RK29_LCDC_PHYS + RK29_LCDC_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .name = "lcdc irq",
+ .start = IRQ_LCDC,
+ .end = IRQ_LCDC,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .name = "win1 buf",
+ .start = MEM_FB_BASE,
+ .end = MEM_FB_BASE + MEM_FB_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+/*platform_device*/
+struct platform_device rk29_device_fb = {
+ .name = "rk29-fb",
+ .id = 4,
+ .num_resources = ARRAY_SIZE(rk29_fb_resource),
+ .resource = rk29_fb_resource,
+ .dev = {
+ .platform_data = &rk29_fb_info,
+ }
+};
+
+struct platform_device rk29_device_dma_cpy = {
+ .name = "dma_memcpy",
+ .id = 4,
+
+};
+
+#endif
+
+static struct android_pmem_platform_data android_pmem_pdata = {
+ .name = "pmem",
+ .start = PMEM_UI_BASE,
+ .size = PMEM_UI_SIZE,
+ .no_allocator = 0,
+ .cached = 1,
+};
+
+static struct platform_device android_pmem_device = {
+ .name = "android_pmem",
+ .id = 0,
+ .dev = {
+ .platform_data = &android_pmem_pdata,
+ },
+};
+
+
+static struct android_pmem_platform_data android_pmem_cam_pdata = {
+ .name = "pmem_cam",
+ .start = PMEM_CAM_BASE,
+ .size = PMEM_CAM_SIZE,
+ .no_allocator = 1,
+ .cached = 1,
+};
+
+static struct platform_device android_pmem_cam_device = {
+ .name = "android_pmem",
+ .id = 1,
+ .dev = {
+ .platform_data = &android_pmem_cam_pdata,
+ },
+};
+
+
+static struct vpu_mem_platform_data vpu_mem_pdata = {
+ .name = "vpu_mem",
+ .start = PMEM_VPU_BASE,
+ .size = PMEM_VPU_SIZE,
+ .cached = 1,
+};
+
+static struct platform_device rk29_vpu_mem_device = {
+ .name = "vpu_mem",
+ .id = 2,
+ .dev = {
+ .platform_data = &vpu_mem_pdata,
+ },
+};
+
+static struct platform_device rk29_v4l2_output_devce = {
+ .name = "rk29_vout",
+};
+
+/*HANNSTAR_P1003 touch*/
+#if defined (CONFIG_HANNSTAR_P1003)
+#define TOUCH_RESET_PIN RK29_PIN6_PC3
+#define TOUCH_INT_PIN RK29_PIN0_PA2
+
+int p1003_init_platform_hw(void)
+{
+ if(gpio_request(TOUCH_RESET_PIN,NULL) != 0){
+ gpio_free(TOUCH_RESET_PIN);
+ printk("p1003_init_platform_hw gpio_request error\n");
+ return -EIO;
+ }
+
+ if(gpio_request(TOUCH_INT_PIN,NULL) != 0){
+ gpio_free(TOUCH_INT_PIN);
+ printk("p1003_init_platform_hw gpio_request error\n");
+ return -EIO;
+ }
+ gpio_pull_updown(TOUCH_INT_PIN, 1);
+ gpio_direction_output(TOUCH_RESET_PIN, 0);
+ msleep(500);
+ gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW);
+ msleep(500);
+ gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH);
+
+ return 0;
+}
+
+
+struct p1003_platform_data p1003_info = {
+ .model= 1003,
+ .init_platform_hw= p1003_init_platform_hw,
+
+};
+#endif
+#if defined (CONFIG_EETI_EGALAX)
+#define TOUCH_RESET_PIN RK29_PIN6_PC3
+#define TOUCH_INT_PIN RK29_PIN0_PA2
+
+static int EETI_EGALAX_init_platform_hw(void)
+{
+ if(gpio_request(TOUCH_RESET_PIN,NULL) != 0){
+ gpio_free(TOUCH_RESET_PIN);
+ printk("p1003_init_platform_hw gpio_request error\n");
+ return -EIO;
+ }
+
+ if(gpio_request(TOUCH_INT_PIN,NULL) != 0){
+ gpio_free(TOUCH_INT_PIN);
+ printk("p1003_init_platform_hw gpio_request error\n");
+ return -EIO;
+ }
+ gpio_pull_updown(TOUCH_INT_PIN, 1);
+ gpio_direction_output(TOUCH_RESET_PIN, 0);
+ msleep(500);
+ gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW);
+ msleep(500);
+ gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH);
+
+ return 0;
+}
+
+
+static struct eeti_egalax_platform_data eeti_egalax_info = {
+ .model= 1003,
+ .init_platform_hw= EETI_EGALAX_init_platform_hw,
+
+};
+#endif
+/*MMA8452 gsensor*/
+#if defined (CONFIG_GS_MMA8452)
+#define MMA8452_INT_PIN RK29_PIN0_PA3
+
+static int mma8452_init_platform_hw(void)
+{
+
+ if(gpio_request(MMA8452_INT_PIN,NULL) != 0){
+ gpio_free(MMA8452_INT_PIN);
+ printk("mma8452_init_platform_hw gpio_request error\n");
+ return -EIO;
+ }
+ gpio_pull_updown(MMA8452_INT_PIN, 1);
+ return 0;
+}
+
+
+static struct mma8452_platform_data mma8452_info = {
+ .model= 8452,
+ .swap_xy = 0,
+ .init_platform_hw= mma8452_init_platform_hw,
+
+};
+#endif
+
+
+/*****************************************************************************************
+* TI TPS65910 voltage regulator devices
+******************************************************************************************/
+#if defined (CONFIG_TPS65910_CORE)
+/* VDD1 */
+static struct regulator_consumer_supply rk29_vdd1_supplies[] = {
+ {
+ .supply = "vcore", // set name vcore for all platform
+ },
+};
+
+/* VDD1 DCDC */
+static struct regulator_init_data rk29_regulator_vdd1 = {
+ .constraints = {
+ .min_uV = 950000,
+ .max_uV = 1400000,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+ .always_on = true,
+ .apply_uV = true,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(rk29_vdd1_supplies),
+ .consumer_supplies = rk29_vdd1_supplies,
+};
+
+/* VDD2 */
+static struct regulator_consumer_supply rk29_vdd2_supplies[] = {
+ {
+ .supply = "vdd2",
+ },
+};
+
+/* VDD2 DCDC */
+static struct regulator_init_data rk29_regulator_vdd2 = {
+ .constraints = {
+ .min_uV = 1200000,
+ .max_uV = 1200000,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .always_on = true,
+ .apply_uV = true,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(rk29_vdd2_supplies),
+ .consumer_supplies = rk29_vdd2_supplies,
+};
+
+/* VIO */
+static struct regulator_consumer_supply rk29_vio_supplies[] = {
+ {
+ .supply = "vio",
+ },
+};
+
+/* VIO LDO */
+static struct regulator_init_data rk29_regulator_vio = {
+ .constraints = {
+ .min_uV = 3300000,
+ .max_uV = 3300000,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .always_on = true,
+ .apply_uV = true,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(rk29_vio_supplies),
+ .consumer_supplies = rk29_vio_supplies,
+};
+
+/* VAUX1 */
+static struct regulator_consumer_supply rk29_vaux1_supplies[] = {
+ {
+ .supply = "vuax1",
+ },
+};
+
+/* VAUX1 LDO */
+static struct regulator_init_data rk29_regulator_vaux1 = {
+ .constraints = {
+ .min_uV = 2800000,
+ .max_uV = 2800000,
+ .valid_modes_mask = REGULATOR_MODE_STANDBY,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .apply_uV = true,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(rk29_vaux1_supplies),
+ .consumer_supplies = rk29_vaux1_supplies,
+};
+
+/* VAUX2 */
+static struct regulator_consumer_supply rk29_vaux2_supplies[] = {
+ {
+ .supply = "vuax2",
+ },
+};
+
+/* VAUX2 LDO */
+static struct regulator_init_data rk29_regulator_vaux2 = {
+ .constraints = {
+ .min_uV = 2900000,
+ .max_uV = 2900000,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .apply_uV = true,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(rk29_vaux2_supplies),
+ .consumer_supplies = rk29_vaux2_supplies,
+};
+
+/* VDAC */
+static struct regulator_consumer_supply rk29_vdac_supplies[] = {
+ {
+ .supply = "vdac",
+ },
+};
+
+/* VDAC LDO */
+static struct regulator_init_data rk29_regulator_vdac = {
+ .constraints = {
+ .min_uV = 1800000,
+ .max_uV = 1800000,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .apply_uV = true,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(rk29_vdac_supplies),
+ .consumer_supplies = rk29_vdac_supplies,
+};
+
+/* VAUX33 */
+static struct regulator_consumer_supply rk29_vaux33_supplies[] = {
+ {
+ .supply = "vaux33",
+ },
+};
+
+/* VAUX33 LDO */
+static struct regulator_init_data rk29_regulator_vaux33 = {
+ .constraints = {
+ .min_uV = 3300000,
+ .max_uV = 3300000,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .apply_uV = true,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(rk29_vaux33_supplies),
+ .consumer_supplies = rk29_vaux33_supplies,
+};
+
+/* VMMC */
+static struct regulator_consumer_supply rk29_vmmc_supplies[] = {
+ {
+ .supply = "vmmc",
+ },
+};
+
+/* VMMC LDO */
+static struct regulator_init_data rk29_regulator_vmmc = {
+ .constraints = {
+ .min_uV = 3000000,
+ .max_uV = 3000000,
+ .valid_modes_mask = REGULATOR_MODE_STANDBY,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .apply_uV = true,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(rk29_vmmc_supplies),
+ .consumer_supplies = rk29_vmmc_supplies,
+};
+
+/* VPLL */
+static struct regulator_consumer_supply rk29_vpll_supplies[] = {
+ {
+ .supply = "vpll",
+ },
+};
+
+/* VPLL LDO */
+static struct regulator_init_data rk29_regulator_vpll = {
+ .constraints = {
+ .min_uV = 2500000,
+ .max_uV = 2500000,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .always_on = true,
+ .apply_uV = true,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(rk29_vpll_supplies),
+ .consumer_supplies = rk29_vpll_supplies,
+};
+
+/* VDIG1 */
+static struct regulator_consumer_supply rk29_vdig1_supplies[] = {
+ {
+ .supply = "vdig1",
+ },
+};
+
+/* VDIG1 LDO */
+static struct regulator_init_data rk29_regulator_vdig1 = {
+ .constraints = {
+ .min_uV = 2700000,
+ .max_uV = 2700000,
+ .valid_modes_mask = REGULATOR_MODE_STANDBY,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .apply_uV = true,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(rk29_vdig1_supplies),
+ .consumer_supplies = rk29_vdig1_supplies,
+};
+
+/* VDIG2 */
+static struct regulator_consumer_supply rk29_vdig2_supplies[] = {
+ {
+ .supply = "vdig2",
+ },
+};
+
+/* VDIG2 LDO */
+static struct regulator_init_data rk29_regulator_vdig2 = {
+ .constraints = {
+ .min_uV = 1200000,
+ .max_uV = 1200000,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .always_on = true,
+ .apply_uV = true,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(rk29_vdig2_supplies),
+ .consumer_supplies = rk29_vdig2_supplies,
+};
+
+static int rk29_tps65910_config(struct tps65910_platform_data *pdata)
+{
+ u8 val = 0;
+ int i = 0;
+ int err = -1;
+
+
+ /* Configure TPS65910 for rk29 board needs */
+ printk("rk29_tps65910_config: tps65910 init config.\n");
+
+ err = tps65910_i2c_read_u8(TPS65910_I2C_ID0, &val, TPS65910_REG_DEVCTRL2);
+ if (err) {
+ printk(KERN_ERR "Unable to read TPS65910_REG_DEVCTRL2 reg\n");
+ return -EIO;
+ }
+ /* Set sleep state active high */
+ val |= (TPS65910_DEV2_SLEEPSIG_POL);
+
+ err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val,
+ TPS65910_REG_DEVCTRL2);
+ if (err) {
+ printk(KERN_ERR "Unable to write TPS65910_REG_DEVCTRL2 reg\n");
+ return -EIO;
+ }
+
+ /* Set the maxinum load current */
+ /* VDD1 */
+ err = tps65910_i2c_read_u8(TPS65910_I2C_ID0, &val, TPS65910_REG_VDD1);
+ if (err) {
+ printk(KERN_ERR "Unable to read TPS65910_REG_VDD1 reg\n");
+ return -EIO;
+ }
+
+ val |= (1<<5);
+ err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, TPS65910_REG_VDD1);
+ if (err) {
+ printk(KERN_ERR "Unable to write TPS65910_REG_VDD1 reg\n");
+ return -EIO;
+ }
+
+ /* VDD2 */
+ err = tps65910_i2c_read_u8(TPS65910_I2C_ID0, &val, TPS65910_REG_VDD2);
+ if (err) {
+ printk(KERN_ERR "Unable to read TPS65910_REG_VDD2 reg\n");
+ return -EIO;
+ }
+
+ val |= (1<<5);
+ err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, TPS65910_REG_VDD2);
+ if (err) {
+ printk(KERN_ERR "Unable to write TPS65910_REG_VDD2 reg\n");
+ return -EIO;
+ }
+
+ /* VIO */
+ err = tps65910_i2c_read_u8(TPS65910_I2C_ID0, &val, TPS65910_REG_VIO);
+ if (err) {
+ printk(KERN_ERR "Unable to read TPS65910_REG_VIO reg\n");
+ return -EIO;
+ }
+
+ val |= (1<<6);
+ err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, TPS65910_REG_VIO);
+ if (err) {
+ printk(KERN_ERR "Unable to write TPS65910_REG_VIO reg\n");
+ return -EIO;
+ }
+
+ /* Mask ALL interrupts */
+ err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, 0xFF,
+ TPS65910_REG_INT_MSK);
+ if (err) {
+ printk(KERN_ERR "Unable to write TPS65910_REG_INT_MSK reg\n");
+ return -EIO;
+ }
+ err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, 0x03,
+ TPS65910_REG_INT_MSK2);
+ if (err) {
+ printk(KERN_ERR "Unable to write TPS65910_REG_INT_MSK2 reg\n");
+ return -EIO;
+ }
+
+ /* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */
+ val = 0;
+ val |= (TPS65910_SR_CTL_I2C_SEL);
+
+ err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val,
+ TPS65910_REG_DEVCTRL);
+ if (err) {
+ printk(KERN_ERR "Unabale to write TPS65910_REG_DEVCTRL reg\n");
+ return -EIO;
+ }
+
+ /* initilize all ISR work as NULL, specific driver will
+ * assign function(s) later.
+ */
+ for (i = 0; i < TPS65910_MAX_IRQS; i++)
+ pdata->handlers[i] = NULL;
+
+ return 0;
+}
+
+struct tps65910_platform_data rk29_tps65910_data = {
+ .irq_num = (unsigned)TPS65910_HOST_IRQ,
+ .gpio = NULL,
+ .vio = &rk29_regulator_vio,
+ .vdd1 = &rk29_regulator_vdd1,
+ .vdd2 = &rk29_regulator_vdd2,
+ .vdd3 = NULL,
+ .vdig1 = &rk29_regulator_vdig1,
+ .vdig2 = &rk29_regulator_vdig2,
+ .vaux33 = &rk29_regulator_vaux33,
+ .vmmc = &rk29_regulator_vmmc,
+ .vaux1 = &rk29_regulator_vaux1,
+ .vaux2 = &rk29_regulator_vaux2,
+ .vdac = &rk29_regulator_vdac,
+ .vpll = &rk29_regulator_vpll,
+ .board_tps65910_config = rk29_tps65910_config,
+};
+
+#endif /* CONFIG_TPS65910_CORE */
+
+
+/*****************************************************************************************
+ * i2c devices
+ * author: kfx@rock-chips.com
+*****************************************************************************************/
+static int rk29_i2c0_io_init(void)
+{
+ rk29_mux_api_set(GPIO2B7_I2C0SCL_NAME, GPIO2L_I2C0_SCL);
+ rk29_mux_api_set(GPIO2B6_I2C0SDA_NAME, GPIO2L_I2C0_SDA);
+ return 0;
+}
+
+static int rk29_i2c1_io_init(void)
+{
+ rk29_mux_api_set(GPIO1A7_I2C1SCL_NAME, GPIO1L_I2C1_SCL);
+ rk29_mux_api_set(GPIO1A6_I2C1SDA_NAME, GPIO1L_I2C1_SDA);
+ return 0;
+}
+static int rk29_i2c2_io_init(void)
+{
+ rk29_mux_api_set(GPIO5D4_I2C2SCL_NAME, GPIO5H_I2C2_SCL);
+ rk29_mux_api_set(GPIO5D3_I2C2SDA_NAME, GPIO5H_I2C2_SDA);
+ return 0;
+}
+
+static int rk29_i2c3_io_init(void)
+{
+ rk29_mux_api_set(GPIO2B5_UART3RTSN_I2C3SCL_NAME, GPIO2L_I2C3_SCL);
+ rk29_mux_api_set(GPIO2B4_UART3CTSN_I2C3SDA_NAME, GPIO2L_I2C3_SDA);
+ return 0;
+}
+
+struct rk29_i2c_platform_data default_i2c0_data = {
+ .bus_num = 0,
+ .flags = 0,
+ .slave_addr = 0xff,
+ .scl_rate = 400*1000,
+ .mode = I2C_MODE_IRQ,
+ .io_init = rk29_i2c0_io_init,
+};
+
+struct rk29_i2c_platform_data default_i2c1_data = {
+ .bus_num = 1,
+ .flags = 0,
+ .slave_addr = 0xff,
+ .scl_rate = 400*1000,
+ .mode = I2C_MODE_POLL,
+ .io_init = rk29_i2c1_io_init,
+};
+
+struct rk29_i2c_platform_data default_i2c2_data = {
+ .bus_num = 2,
+ .flags = 0,
+ .slave_addr = 0xff,
+ .scl_rate = 400*1000,
+ .mode = I2C_MODE_IRQ,
+ .io_init = rk29_i2c2_io_init,
+};
+
+struct rk29_i2c_platform_data default_i2c3_data = {
+ .bus_num = 3,
+ .flags = 0,
+ .slave_addr = 0xff,
+ .scl_rate = 400*1000,
+ .mode = I2C_MODE_POLL,
+ .io_init = rk29_i2c3_io_init,
+};
+
+#ifdef CONFIG_I2C0_RK29
+static struct i2c_board_info __initdata board_i2c0_devices[] = {
+#if defined (CONFIG_RK1000_CONTROL)
+ {
+ .type = "rk1000_control",
+ .addr = 0x40,
+ .flags = 0,
+ },
+#endif
+#if defined (CONFIG_SND_SOC_RK1000)
+ {
+ .type = "rk1000_i2c_codec",
+ .addr = 0x60,
+ .flags = 0,
+ },
+#endif
+#if defined (CONFIG_SND_SOC_WM8900)
+ {
+ .type = "wm8900",
+ .addr = 0x1A,
+ .flags = 0,
+ },
+#endif
+#if defined (CONFIG_BATTERY_STC3100)
+ {
+ .type = "stc3100",
+ .addr = 0x70,
+ .flags = 0,
+ },
+#endif
+#if defined (CONFIG_BATTERY_BQ27510)
+ {
+ .type = "bq27510",
+ .addr = 0x55,
+ .flags = 0,
+ },
+#endif
+#if defined (CONFIG_RTC_HYM8563)
+ {
+ .type = "rtc_hym8563",
+ .addr = 0x51,
+ .flags = 0,
+ .irq = RK29_PIN0_PA1,
+ },
+#endif
+#if defined (CONFIG_GS_MMA8452)
+ {
+ .type = "gs_mma8452",
+ .addr = 0x1c,
+ .flags = 0,
+ .irq = MMA8452_INT_PIN,
+ .platform_data = &mma8452_info,
+ },
+#endif
+#if defined (CONFIG_SENSORS_AK8973)
+ {
+ .type = "ak8973",
+ .addr = 0x1d,
+ .flags = 0,
+ .irq = RK29_PIN0_PA4,
+ },
+#endif
+#if defined (CONFIG_SENSORS_AK8975)
+ {
+ .type = "ak8975",
+ .addr = 0x0d,
+ .flags = 0,
+ .irq = RK29_PIN0_PA4,
+ },
+#endif
+};
+#endif
+
+#ifdef CONFIG_I2C1_RK29
+static struct i2c_board_info __initdata board_i2c1_devices[] = {
+#if defined (CONFIG_RK1000_CONTROL1)
+ {
+ .type = "rk1000_control",
+ .addr = 0x40,
+ .flags = 0,
+ },
+#endif
+#if defined (CONFIG_ANX7150)
+ {
+ .type = "anx7150",
+ .addr = 0x39, //0x39, 0x3d
+ .flags = 0,
+ .irq = RK29_PIN1_PD7,
+ },
+#endif
+
+};
+#endif
+
+#ifdef CONFIG_I2C2_RK29
+static struct i2c_board_info __initdata board_i2c2_devices[] = {
+#if defined (CONFIG_HANNSTAR_P1003)
+ {
+ .type = "p1003_touch",
+ .addr = 0x04,
+ .flags = 0,
+ .irq = RK29_PIN0_PA2,
+ .platform_data = &p1003_info,
+ },
+#endif
+#if defined (CONFIG_EETI_EGALAX)
+ {
+ .type = "egalax_i2c",
+ .addr = 0x04,
+ .flags = 0,
+ .irq = RK29_PIN0_PA2,
+ .platform_data = &eeti_egalax_info,
+ },
+#endif
+#if defined (CONFIG_TPS65910_CORE)
+ {
+ .type = "tps65910",
+ .addr = TPS65910_I2C_ID0,
+ .flags = 0,
+ .irq = TPS65910_HOST_IRQ,
+ .platform_data = &rk29_tps65910_data,
+ },
+#endif
+};
+#endif
+
+#ifdef CONFIG_I2C3_RK29
+static struct i2c_board_info __initdata board_i2c3_devices[] = {
+};
+#endif
+
+/*****************************************************************************************
+ * camera devices
+ * author: ddl@rock-chips.com
+ *****************************************************************************************/
+#ifdef CONFIG_VIDEO_RK29
+#define SENSOR_NAME_0 RK29_CAM_SENSOR_NAME_OV5642 /* back camera sensor */
+#define SENSOR_IIC_ADDR_0 0x78
+#define SENSOR_IIC_ADAPTER_ID_0 1
+#define SENSOR_POWER_PIN_0 INVALID_GPIO
+#define SENSOR_RESET_PIN_0 INVALID_GPIO
+#define SENSOR_POWERDN_PIN_0 RK29_PIN6_PB7
+#define SENSOR_FALSH_PIN_0 INVALID_GPIO
+#define SENSOR_POWERACTIVE_LEVEL_0 RK29_CAM_POWERACTIVE_L
+#define SENSOR_RESETACTIVE_LEVEL_0 RK29_CAM_RESETACTIVE_L
+#define SENSOR_POWERDNACTIVE_LEVEL_0 RK29_CAM_POWERDNACTIVE_H
+#define SENSOR_FLASHACTIVE_LEVEL_0 RK29_CAM_FLASHACTIVE_L
+
+#define SENSOR_NAME_1 RK29_CAM_SENSOR_NAME_OV2659 /* front camera sensor */
+#define SENSOR_IIC_ADDR_1 0x60
+#define SENSOR_IIC_ADAPTER_ID_1 1
+#define SENSOR_POWER_PIN_1 INVALID_GPIO
+#define SENSOR_RESET_PIN_1 INVALID_GPIO
+#define SENSOR_POWERDN_PIN_1 RK29_PIN5_PD7
+#define SENSOR_FALSH_PIN_1 INVALID_GPIO
+#define SENSOR_POWERACTIVE_LEVEL_1 RK29_CAM_POWERACTIVE_L
+#define SENSOR_RESETACTIVE_LEVEL_1 RK29_CAM_RESETACTIVE_L
+#define SENSOR_POWERDNACTIVE_LEVEL_1 RK29_CAM_POWERDNACTIVE_H
+#define SENSOR_FLASHACTIVE_LEVEL_1 RK29_CAM_FLASHACTIVE_L
+
+static int rk29_sensor_io_init(void);
+static int rk29_sensor_io_deinit(int sensor);
+static int rk29_sensor_ioctrl(struct device *dev,enum rk29camera_ioctrl_cmd cmd,int on);
+
+static struct rk29camera_platform_data rk29_camera_platform_data = {
+ .io_init = rk29_sensor_io_init,
+ .io_deinit = rk29_sensor_io_deinit,
+ .sensor_ioctrl = rk29_sensor_ioctrl,
+ .gpio_res = {
+ {
+ .gpio_reset = SENSOR_RESET_PIN_0,
+ .gpio_power = SENSOR_POWER_PIN_0,
+ .gpio_powerdown = SENSOR_POWERDN_PIN_0,
+ .gpio_flash = SENSOR_FALSH_PIN_0,
+ .gpio_flag = (SENSOR_POWERACTIVE_LEVEL_0|SENSOR_RESETACTIVE_LEVEL_0|SENSOR_POWERDNACTIVE_LEVEL_0|SENSOR_FLASHACTIVE_LEVEL_0),
+ .gpio_init = 0,
+ .dev_name = SENSOR_NAME_0,
+ }, {
+ .gpio_reset = SENSOR_RESET_PIN_1,
+ .gpio_power = SENSOR_POWER_PIN_1,
+ .gpio_powerdown = SENSOR_POWERDN_PIN_1,
+ .gpio_flash = SENSOR_FALSH_PIN_1,
+ .gpio_flag = (SENSOR_POWERACTIVE_LEVEL_1|SENSOR_RESETACTIVE_LEVEL_1|SENSOR_POWERDNACTIVE_LEVEL_1|SENSOR_FLASHACTIVE_LEVEL_1),
+ .gpio_init = 0,
+ .dev_name = SENSOR_NAME_1,
+ }
+ },
+ #ifdef CONFIG_VIDEO_RK29_WORK_IPP
+ .meminfo = {
+ .name = "camera_ipp_mem",
+ .start = MEM_CAMIPP_BASE,
+ .size = MEM_CAMIPP_SIZE,
+ }
+ #endif
+};
+
+static int rk29_sensor_io_init(void)
+{
+ int ret = 0, i;
+ unsigned int camera_reset = INVALID_GPIO, camera_power = INVALID_GPIO;
+ unsigned int camera_powerdown = INVALID_GPIO, camera_flash = INVALID_GPIO;
+ unsigned int camera_ioflag;
+
+ for (i=0; i<2; i++) {
+ camera_reset = rk29_camera_platform_data.gpio_res[i].gpio_reset;
+ camera_power = rk29_camera_platform_data.gpio_res[i].gpio_power;
+ camera_powerdown = rk29_camera_platform_data.gpio_res[i].gpio_powerdown;
+ camera_flash = rk29_camera_platform_data.gpio_res[i].gpio_flash;
+ camera_ioflag = rk29_camera_platform_data.gpio_res[i].gpio_flag;
+ rk29_camera_platform_data.gpio_res[i].gpio_init = 0;
+
+ if (camera_power != INVALID_GPIO) {
+ ret = gpio_request(camera_power, "camera power");
+ if (ret)
+ goto sensor_io_int_loop_end;
+ rk29_camera_platform_data.gpio_res[i].gpio_init |= RK29_CAM_POWERACTIVE_MASK;
+ gpio_set_value(camera_reset, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
+ gpio_direction_output(camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
+
+ //printk("\n%s....power pin(%d) init success(0x%x) \n",__FUNCTION__,camera_power,(((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
+
+ }
+
+ if (camera_reset != INVALID_GPIO) {
+ ret = gpio_request(camera_reset, "camera reset");
+ if (ret)
+ goto sensor_io_int_loop_end;
+ rk29_camera_platform_data.gpio_res[i].gpio_init |= RK29_CAM_RESETACTIVE_MASK;
+ gpio_set_value(camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
+ gpio_direction_output(camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
+
+ //printk("\n%s....reset pin(%d) init success(0x%x)\n",__FUNCTION__,camera_reset,((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
+
+ }
+
+ if (camera_powerdown != INVALID_GPIO) {
+ ret = gpio_request(camera_powerdown, "camera powerdown");
+ if (ret)
+ goto sensor_io_int_loop_end;
+ rk29_camera_platform_data.gpio_res[i].gpio_init |= RK29_CAM_POWERDNACTIVE_MASK;
+ gpio_set_value(camera_powerdown, ((camera_ioflag&RK29_CAM_POWERDNACTIVE_MASK)>>RK29_CAM_POWERDNACTIVE_BITPOS));
+ gpio_direction_output(camera_powerdown, ((camera_ioflag&RK29_CAM_POWERDNACTIVE_MASK)>>RK29_CAM_POWERDNACTIVE_BITPOS));
+
+ //printk("\n%s....powerdown pin(%d) init success(0x%x) \n",__FUNCTION__,camera_powerdown,((camera_ioflag&RK29_CAM_POWERDNACTIVE_BITPOS)>>RK29_CAM_POWERDNACTIVE_BITPOS));
+
+ }
+
+ if (camera_flash != INVALID_GPIO) {
+ ret = gpio_request(camera_flash, "camera flash");
+ if (ret)
+ goto sensor_io_int_loop_end;
+ rk29_camera_platform_data.gpio_res[i].gpio_init |= RK29_CAM_FLASHACTIVE_MASK;
+ gpio_set_value(camera_flash, ((camera_ioflag&RK29_CAM_FLASHACTIVE_MASK)>>RK29_CAM_FLASHACTIVE_BITPOS));
+ gpio_direction_output(camera_flash, ((camera_ioflag&RK29_CAM_FLASHACTIVE_MASK)>>RK29_CAM_FLASHACTIVE_BITPOS));
+
+ //printk("\n%s....flash pin(%d) init success(0x%x) \n",__FUNCTION__,camera_flash,((camera_ioflag&RK29_CAM_FLASHACTIVE_MASK)>>RK29_CAM_FLASHACTIVE_BITPOS));
+
+ }
+ continue;
+sensor_io_int_loop_end:
+ rk29_sensor_io_deinit(i);
+ continue;
+ }
+
+ return 0;
+}
+
+static int rk29_sensor_io_deinit(int sensor)
+{
+ unsigned int camera_reset = INVALID_GPIO, camera_power = INVALID_GPIO;
+ unsigned int camera_powerdown = INVALID_GPIO, camera_flash = INVALID_GPIO;
+
+ camera_reset = rk29_camera_platform_data.gpio_res[sensor].gpio_reset;
+ camera_power = rk29_camera_platform_data.gpio_res[sensor].gpio_power;
+ camera_powerdown = rk29_camera_platform_data.gpio_res[sensor].gpio_powerdown;
+ camera_flash = rk29_camera_platform_data.gpio_res[sensor].gpio_flash;
+
+ if (rk29_camera_platform_data.gpio_res[sensor].gpio_init & RK29_CAM_POWERACTIVE_MASK) {
+ if (camera_power != INVALID_GPIO) {
+ gpio_direction_input(camera_power);
+ gpio_free(camera_power);
+ }
+ }
+
+ if (rk29_camera_platform_data.gpio_res[sensor].gpio_init & RK29_CAM_RESETACTIVE_MASK) {
+ if (camera_reset != INVALID_GPIO) {
+ gpio_direction_input(camera_reset);
+ gpio_free(camera_reset);
+ }
+ }
+
+ if (rk29_camera_platform_data.gpio_res[sensor].gpio_init & RK29_CAM_POWERDNACTIVE_MASK) {
+ if (camera_powerdown != INVALID_GPIO) {
+ gpio_direction_input(camera_powerdown);
+ gpio_free(camera_powerdown);
+ }
+ }
+
+ if (rk29_camera_platform_data.gpio_res[sensor].gpio_init & RK29_CAM_FLASHACTIVE_MASK) {
+ if (camera_flash != INVALID_GPIO) {
+ gpio_direction_input(camera_flash);
+ gpio_free(camera_flash);
+ }
+ }
+
+ rk29_camera_platform_data.gpio_res[sensor].gpio_init = 0;
+ return 0;
+}
+static int rk29_sensor_ioctrl(struct device *dev,enum rk29camera_ioctrl_cmd cmd, int on)
+{
+ unsigned int camera_power=INVALID_GPIO,camera_reset=INVALID_GPIO, camera_powerdown=INVALID_GPIO,camera_flash = INVALID_GPIO;
+ unsigned int camera_ioflag,camera_io_init;
+ int ret = RK29_CAM_IO_SUCCESS;
+
+ if(rk29_camera_platform_data.gpio_res[0].dev_name && (strcmp(rk29_camera_platform_data.gpio_res[0].dev_name, dev_name(dev)) == 0)) {
+ camera_power = rk29_camera_platform_data.gpio_res[0].gpio_power;
+ camera_reset = rk29_camera_platform_data.gpio_res[0].gpio_reset;
+ camera_powerdown = rk29_camera_platform_data.gpio_res[0].gpio_powerdown;
+ camera_flash = rk29_camera_platform_data.gpio_res[0].gpio_flash;
+ camera_ioflag = rk29_camera_platform_data.gpio_res[0].gpio_flag;
+ camera_io_init = rk29_camera_platform_data.gpio_res[0].gpio_init;
+ } else if (rk29_camera_platform_data.gpio_res[1].dev_name && (strcmp(rk29_camera_platform_data.gpio_res[1].dev_name, dev_name(dev)) == 0)) {
+ camera_power = rk29_camera_platform_data.gpio_res[1].gpio_power;
+ camera_reset = rk29_camera_platform_data.gpio_res[1].gpio_reset;
+ camera_powerdown = rk29_camera_platform_data.gpio_res[1].gpio_powerdown;
+ camera_flash = rk29_camera_platform_data.gpio_res[1].gpio_flash;
+ camera_ioflag = rk29_camera_platform_data.gpio_res[1].gpio_flag;
+ camera_io_init = rk29_camera_platform_data.gpio_res[1].gpio_init;
+ }
+
+ switch (cmd)
+ {
+ case Cam_Power:
+ {
+ if (camera_power != INVALID_GPIO) {
+ if (camera_io_init & RK29_CAM_POWERACTIVE_MASK) {
+ if (on) {
+ gpio_set_value(camera_power, ((camera_ioflag&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
+ //printk("\n%s..%s..PowerPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_power, ((camera_ioflag&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
+ msleep(10);
+ } else {
+ gpio_set_value(camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
+ //printk("\n%s..%s..PowerPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
+ }
+ } else {
+ ret = RK29_CAM_EIO_REQUESTFAIL;
+ printk("\n%s..%s..ResetPin=%d request failed!\n",__FUNCTION__,dev_name(dev),camera_reset);
+ }
+ } else {
+ ret = RK29_CAM_EIO_INVALID;
+ }
+ break;
+ }
+ case Cam_Reset:
+ {
+ if (camera_reset != INVALID_GPIO) {
+ if (camera_io_init & RK29_CAM_RESETACTIVE_MASK) {
+ if (on) {
+ gpio_set_value(camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
+ //printk("\n%s..%s..ResetPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev),camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
+ } else {
+ gpio_set_value(camera_reset,(((~camera_ioflag)&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
+ //printk("\n%s..%s..ResetPin= %d..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_reset, (((~camera_ioflag)&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
+ }
+ } else {
+ ret = RK29_CAM_EIO_REQUESTFAIL;
+ printk("\n%s..%s..ResetPin=%d request failed!\n",__FUNCTION__,dev_name(dev),camera_reset);
+ }
+ } else {
+ ret = RK29_CAM_EIO_INVALID;
+ }
+ break;
+ }
+
+ case Cam_PowerDown:
+ {
+ if (camera_powerdown != INVALID_GPIO) {
+ if (camera_io_init & RK29_CAM_POWERDNACTIVE_MASK) {
+ if (on) {
+ gpio_set_value(camera_powerdown, ((camera_ioflag&RK29_CAM_POWERDNACTIVE_MASK)>>RK29_CAM_POWERDNACTIVE_BITPOS));
+ //printk("\n%s..%s..PowerDownPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev),camera_powerdown, ((camera_ioflag&RK29_CAM_POWERDNACTIVE_MASK)>>RK29_CAM_POWERDNACTIVE_BITPOS));
+ } else {
+ gpio_set_value(camera_powerdown,(((~camera_ioflag)&RK29_CAM_POWERDNACTIVE_MASK)>>RK29_CAM_POWERDNACTIVE_BITPOS));
+ //printk("\n%s..%s..PowerDownPin= %d..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_powerdown, (((~camera_ioflag)&RK29_CAM_POWERDNACTIVE_MASK)>>RK29_CAM_POWERDNACTIVE_BITPOS));
+ }
+ } else {
+ ret = RK29_CAM_EIO_REQUESTFAIL;
+ printk("\n%s..%s..PowerDownPin=%d request failed!\n",__FUNCTION__,dev_name(dev),camera_powerdown);
+ }
+ } else {
+ ret = RK29_CAM_EIO_INVALID;
+ }
+ break;
+ }
+
+ case Cam_Flash:
+ {
+ if (camera_flash != INVALID_GPIO) {
+ if (camera_io_init & RK29_CAM_FLASHACTIVE_MASK) {
+ if (on) {
+ gpio_set_value(camera_flash, ((camera_ioflag&RK29_CAM_FLASHACTIVE_MASK)>>RK29_CAM_FLASHACTIVE_BITPOS));
+ //printk("\n%s..%s..FlashPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev),camera_flash, ((camera_ioflag&RK29_CAM_FLASHACTIVE_MASK)>>RK29_CAM_FLASHACTIVE_BITPOS));
+ } else {
+ gpio_set_value(camera_flash,(((~camera_ioflag)&RK29_CAM_FLASHACTIVE_MASK)>>RK29_CAM_FLASHACTIVE_BITPOS));
+ //printk("\n%s..%s..FlashPin= %d..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_flash, (((~camera_ioflag)&RK29_CAM_FLASHACTIVE_MASK)>>RK29_CAM_FLASHACTIVE_BITPOS));
+ }
+ } else {
+ ret = RK29_CAM_EIO_REQUESTFAIL;
+ printk("\n%s..%s..FlashPin=%d request failed!\n",__FUNCTION__,dev_name(dev),camera_flash);
+ }
+ } else {
+ ret = RK29_CAM_EIO_INVALID;
+ }
+ break;
+ }
+
+ default:
+ {
+ printk("%s cmd(0x%x) is unknown!\n",__FUNCTION__, cmd);
+ break;
+ }
+ }
+ return ret;
+}
+static int rk29_sensor_power(struct device *dev, int on)
+{
+ rk29_sensor_ioctrl(dev,Cam_Power,on);
+ return 0;
+}
+static int rk29_sensor_reset(struct device *dev)
+{
+ rk29_sensor_ioctrl(dev,Cam_Reset,1);
+ msleep(2);
+ rk29_sensor_ioctrl(dev,Cam_Reset,0);
+ return 0;
+}
+static int rk29_sensor_powerdown(struct device *dev, int on)
+{
+ return rk29_sensor_ioctrl(dev,Cam_PowerDown,on);
+}
+#if (SENSOR_IIC_ADDR_0 != 0x00)
+static struct i2c_board_info rk29_i2c_cam_info_0[] = {
+ {
+ I2C_BOARD_INFO(SENSOR_NAME_0, SENSOR_IIC_ADDR_0>>1)
+ },
+};
+
+static struct soc_camera_link rk29_iclink_0 = {
+ .bus_id = RK29_CAM_PLATFORM_DEV_ID,
+ .power = rk29_sensor_power,
+ .powerdown = rk29_sensor_powerdown,
+ .board_info = &rk29_i2c_cam_info_0[0],
+ .i2c_adapter_id = SENSOR_IIC_ADAPTER_ID_0,
+ .module_name = SENSOR_NAME_0,
+};
+
+/*platform_device : soc-camera need */
+static struct platform_device rk29_soc_camera_pdrv_0 = {
+ .name = "soc-camera-pdrv",
+ .id = 0,
+ .dev = {
+ .init_name = SENSOR_NAME_0,
+ .platform_data = &rk29_iclink_0,
+ },
+};
+#endif
+static struct i2c_board_info rk29_i2c_cam_info_1[] = {
+ {
+ I2C_BOARD_INFO(SENSOR_NAME_1, SENSOR_IIC_ADDR_1>>1)
+ },
+};
+
+static struct soc_camera_link rk29_iclink_1 = {
+ .bus_id = RK29_CAM_PLATFORM_DEV_ID,
+ .power = rk29_sensor_power,
+ .powerdown = rk29_sensor_powerdown,
+ .board_info = &rk29_i2c_cam_info_1[0],
+ .i2c_adapter_id = SENSOR_IIC_ADAPTER_ID_1,
+ .module_name = SENSOR_NAME_1,
+};
+
+/*platform_device : soc-camera need */
+static struct platform_device rk29_soc_camera_pdrv_1 = {
+ .name = "soc-camera-pdrv",
+ .id = 1,
+ .dev = {
+ .init_name = SENSOR_NAME_1,
+ .platform_data = &rk29_iclink_1,
+ },
+};
+
+
+static u64 rockchip_device_camera_dmamask = 0xffffffffUL;
+static struct resource rk29_camera_resource[] = {
+ [0] = {
+ .start = RK29_VIP_PHYS,
+ .end = RK29_VIP_PHYS + RK29_VIP_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_VIP,
+ .end = IRQ_VIP,
+ .flags = IORESOURCE_IRQ,
+ }
+};
+
+/*platform_device : */
+static struct platform_device rk29_device_camera = {
+ .name = RK29_CAM_DRV_NAME,
+ .id = RK29_CAM_PLATFORM_DEV_ID, /* This is used to put cameras on this interface */
+ .num_resources = ARRAY_SIZE(rk29_camera_resource),
+ .resource = rk29_camera_resource,
+ .dev = {
+ .dma_mask = &rockchip_device_camera_dmamask,
+ .coherent_dma_mask = 0xffffffffUL,
+ .platform_data = &rk29_camera_platform_data,
+ }
+};
+#endif
+/*****************************************************************************************
+ * backlight devices
+ * author: nzy@rock-chips.com
+ *****************************************************************************************/
+#ifdef CONFIG_BACKLIGHT_RK29_BL
+ /*
+ GPIO1B5_PWM0_NAME, GPIO1L_PWM0
+ GPIO5D2_PWM1_UART1SIRIN_NAME, GPIO5H_PWM1
+ GPIO2A3_SDMMC0WRITEPRT_PWM2_NAME, GPIO2L_PWM2
+ GPIO1A5_EMMCPWREN_PWM3_NAME, GPIO1L_PWM3
+ */
+
+#define PWM_ID 0
+#define PWM_MUX_NAME GPIO1B5_PWM0_NAME
+#define PWM_MUX_MODE GPIO1L_PWM0
+#define PWM_MUX_MODE_GPIO GPIO1L_GPIO1B5
+#define PWM_EFFECT_VALUE 1
+
+//#define LCD_DISP_ON_PIN
+
+#ifdef LCD_DISP_ON_PIN
+#define BL_EN_MUX_NAME GPIOF34_UART3_SEL_NAME
+#define BL_EN_MUX_MODE IOMUXB_GPIO1_B34
+
+#define BL_EN_PIN GPIO0L_GPIO0A5
+#define BL_EN_VALUE GPIO_HIGH
+#endif
+static int rk29_backlight_io_init(void)
+{
+ int ret = 0;
+
+ rk29_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE);
+ #ifdef LCD_DISP_ON_PIN
+ rk29_mux_api_set(BL_EN_MUX_NAME, BL_EN_MUX_MODE);
+
+ ret = gpio_request(BL_EN_PIN, NULL);
+ if(ret != 0)
+ {
+ gpio_free(BL_EN_PIN);
+ }
+
+ gpio_direction_output(BL_EN_PIN, 0);
+ gpio_set_value(BL_EN_PIN, BL_EN_VALUE);
+ #endif
+ return ret;
+}
+
+static int rk29_backlight_io_deinit(void)
+{
+ int ret = 0;
+ #ifdef LCD_DISP_ON_PIN
+ gpio_free(BL_EN_PIN);
+ #endif
+ rk29_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE_GPIO);
+ return ret;
+}
+struct rk29_bl_info rk29_bl_info = {
+ .pwm_id = PWM_ID,
+ .bl_ref = PWM_EFFECT_VALUE,
+ .io_init = rk29_backlight_io_init,
+ .io_deinit = rk29_backlight_io_deinit,
+};
+#endif
+/*****************************************************************************************
+* pwm voltage regulator devices
+******************************************************************************************/
+#if defined (CONFIG_RK29_PWM_REGULATOR)
+
+#define REGULATOR_PWM_ID 2
+#define REGULATOR_PWM_MUX_NAME GPIO2A3_SDMMC0WRITEPRT_PWM2_NAME
+#define REGULATOR_PWM_MUX_MODE GPIO2L_PWM2
+#define REGULATOR_PWM_MUX_MODE_GPIO GPIO2L_GPIO2A3
+#define REGULATOR_PWM_GPIO RK29_PIN2_PA3
+
+static struct regulator_consumer_supply pwm_consumers[] = {
+ {
+ .supply = "vcore",
+ }
+};
+
+static struct regulator_init_data rk29_pwm_regulator_data = {
+ .constraints = {
+ .name = "PWM2",
+ .min_uV = 950000,
+ .max_uV = 1400000,
+ .apply_uV = 1,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(pwm_consumers),
+ .consumer_supplies = pwm_consumers,
+};
+
+static struct pwm_platform_data rk29_regulator_pwm_platform_data = {
+ .pwm_id = REGULATOR_PWM_ID,
+ .pwm_gpio = REGULATOR_PWM_GPIO,
+ //.pwm_iomux_name[] = REGULATOR_PWM_MUX_NAME;
+ .pwm_iomux_name = REGULATOR_PWM_MUX_NAME,
+ .pwm_iomux_pwm = REGULATOR_PWM_MUX_MODE,
+ .pwm_iomux_gpio = REGULATOR_PWM_MUX_MODE_GPIO,
+ .init_data = &rk29_pwm_regulator_data,
+};
+
+static struct platform_device rk29_device_pwm_regulator = {
+ .name = "pwm-voltage-regulator",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk29_regulator_pwm_platform_data,
+ },
+};
+
+#endif
+
+/*****************************************************************************************
+ * SDMMC devices
+*****************************************************************************************/
+#ifdef CONFIG_SDMMC0_RK29
+static int rk29_sdmmc0_cfg_gpio(void)
+{
+ rk29_mux_api_set(GPIO1D1_SDMMC0CMD_NAME, GPIO1H_SDMMC0_CMD);
+ rk29_mux_api_set(GPIO1D0_SDMMC0CLKOUT_NAME, GPIO1H_SDMMC0_CLKOUT);
+ rk29_mux_api_set(GPIO1D2_SDMMC0DATA0_NAME, GPIO1H_SDMMC0_DATA0);
+ rk29_mux_api_set(GPIO1D3_SDMMC0DATA1_NAME, GPIO1H_SDMMC0_DATA1);
+ rk29_mux_api_set(GPIO1D4_SDMMC0DATA2_NAME, GPIO1H_SDMMC0_DATA2);
+ rk29_mux_api_set(GPIO1D5_SDMMC0DATA3_NAME, GPIO1H_SDMMC0_DATA3);
+ rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_SDMMC0_DETECT_N);
+ rk29_mux_api_set(GPIO5D5_SDMMC0PWREN_NAME, GPIO5H_GPIO5D5); ///GPIO5H_SDMMC0_PWR_EN); ///GPIO5H_GPIO5D5);
+ gpio_request(RK29_PIN5_PD5,"sdmmc");
+ gpio_set_value(RK29_PIN5_PD5,GPIO_HIGH);
+ mdelay(100);
+ gpio_set_value(RK29_PIN5_PD5,GPIO_LOW);
+ return 0;
+}
+
+#define CONFIG_SDMMC0_USE_DMA
+struct rk29_sdmmc_platform_data default_sdmmc0_data = {
+ .host_ocr_avail = (MMC_VDD_25_26|MMC_VDD_26_27|MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
+ MMC_VDD_30_31|MMC_VDD_31_32|MMC_VDD_32_33|
+ MMC_VDD_33_34|MMC_VDD_34_35| MMC_VDD_35_36),
+ .host_caps = (MMC_CAP_4_BIT_DATA|MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),
+ .io_init = rk29_sdmmc0_cfg_gpio,
+ .dma_name = "sd_mmc",
+#ifdef CONFIG_SDMMC0_USE_DMA
+ .use_dma = 1,
+#else
+ .use_dma = 0,
+#endif
+};
+#endif
+#ifdef CONFIG_SDMMC1_RK29
+#define CONFIG_SDMMC1_USE_DMA
+static int rk29_sdmmc1_cfg_gpio(void)
+{
+ rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_SDMMC1_CMD);
+ rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_SDMMC1_CLKOUT);
+ rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_SDMMC1_DATA0);
+ rk29_mux_api_set(GPIO1C4_SDMMC1DATA1_NAME, GPIO1H_SDMMC1_DATA1);
+ rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME, GPIO1H_SDMMC1_DATA2);
+ rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_SDMMC1_DATA3);
+ //rk29_mux_api_set(GPIO1C0_UART0CTSN_SDMMC1DETECTN_NAME, GPIO1H_SDMMC1_DETECT_N);
+ return 0;
+}
+
+#ifdef CONFIG_WIFI_CONTROL_FUNC
+static int rk29sdk_wifi_status(struct device *dev);
+static int rk29sdk_wifi_status_register(void (*callback)(int card_presend, void *dev_id), void *dev_id);
+#endif
+
+#define RK29SDK_WIFI_SDIO_CARD_DETECT_N RK29_PIN1_PD6
+
+struct rk29_sdmmc_platform_data default_sdmmc1_data = {
+ .host_ocr_avail = (MMC_VDD_25_26|MMC_VDD_26_27|MMC_VDD_27_28|MMC_VDD_28_29|
+ MMC_VDD_29_30|MMC_VDD_30_31|MMC_VDD_31_32|
+ MMC_VDD_32_33|MMC_VDD_33_34),
+ .host_caps = (MMC_CAP_4_BIT_DATA|MMC_CAP_SDIO_IRQ|
+ MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),
+ .io_init = rk29_sdmmc1_cfg_gpio,
+ .dma_name = "sdio",
+#ifdef CONFIG_SDMMC1_USE_DMA
+ .use_dma = 1,
+#else
+ .use_dma = 0,
+#endif
+#ifdef CONFIG_WIFI_CONTROL_FUNC
+ .status = rk29sdk_wifi_status,
+ .register_status_notify = rk29sdk_wifi_status_register,
+#endif
+#if 0
+ .detect_irq = RK29SDK_WIFI_SDIO_CARD_DETECT_N,
+#endif
+};
+#endif
+
+#ifdef CONFIG_WIFI_CONTROL_FUNC
+#define RK29SDK_WIFI_BT_GPIO_POWER_N RK29_PIN5_PD6
+#define RK29SDK_WIFI_GPIO_RESET_N RK29_PIN6_PC0
+#define RK29SDK_BT_GPIO_RESET_N RK29_PIN6_PC4
+
+static int rk29sdk_wifi_cd = 0; /* wifi virtual 'card detect' status */
+static void (*wifi_status_cb)(int card_present, void *dev_id);
+static void *wifi_status_cb_devid;
+int rk29sdk_wifi_power_state = 0;
+int rk29sdk_bt_power_state = 0;
+
+static int rk29sdk_wifi_status(struct device *dev)
+{
+ return rk29sdk_wifi_cd;
+}
+
+static int rk29sdk_wifi_status_register(void (*callback)(int card_present, void *dev_id), void *dev_id)
+{
+ if(wifi_status_cb)
+ return -EAGAIN;
+ wifi_status_cb = callback;
+ wifi_status_cb_devid = dev_id;
+ return 0;
+}
+
+static int rk29sdk_wifi_bt_gpio_control_init(void)
+{
+ if (gpio_request(RK29SDK_WIFI_BT_GPIO_POWER_N, "wifi_bt_power")) {
+ pr_info("%s: request wifi_bt power gpio failed\n", __func__);
+ return -1;
+ }
+
+ if (gpio_request(RK29SDK_WIFI_GPIO_RESET_N, "wifi reset")) {
+ pr_info("%s: request wifi reset gpio failed\n", __func__);
+ gpio_free(RK29SDK_WIFI_BT_GPIO_POWER_N);
+ return -1;
+ }
+
+ if (gpio_request(RK29SDK_BT_GPIO_RESET_N, "bt reset")) {
+ pr_info("%s: request bt reset gpio failed\n", __func__);
+ gpio_free(RK29SDK_WIFI_GPIO_RESET_N);
+ return -1;
+ }
+
+ gpio_direction_output(RK29SDK_WIFI_BT_GPIO_POWER_N, GPIO_LOW);
+ gpio_direction_output(RK29SDK_WIFI_GPIO_RESET_N, GPIO_LOW);
+ gpio_direction_output(RK29SDK_BT_GPIO_RESET_N, GPIO_LOW);
+
+ pr_info("%s: init finished\n",__func__);
+
+ return 0;
+}
+
+static int rk29sdk_wifi_power(int on)
+{
+ pr_info("%s: %d\n", __func__, on);
+ if (on){
+ gpio_set_value(RK29SDK_WIFI_BT_GPIO_POWER_N, on);
+ mdelay(100);
+ pr_info("wifi turn on power\n");
+ }else{
+ if (!rk29sdk_bt_power_state){
+ gpio_set_value(RK29SDK_WIFI_BT_GPIO_POWER_N, on);
+ mdelay(100);
+ pr_info("wifi shut off power\n");
+ }else
+ {
+ pr_info("wifi shouldn't shut off power, bt is using it!\n");
+ }
+
+ }
+
+ rk29sdk_wifi_power_state = on;
+ return 0;
+}
+
+static int rk29sdk_wifi_reset_state;
+static int rk29sdk_wifi_reset(int on)
+{
+ pr_info("%s: %d\n", __func__, on);
+ gpio_set_value(RK29SDK_WIFI_GPIO_RESET_N, on);
+ mdelay(100);
+ rk29sdk_wifi_reset_state = on;
+ return 0;
+}
+
+int rk29sdk_wifi_set_carddetect(int val)
+{
+ pr_info("%s:%d\n", __func__, val);
+ rk29sdk_wifi_cd = val;
+ if (wifi_status_cb){
+ wifi_status_cb(val, wifi_status_cb_devid);
+ }else {
+ pr_warning("%s, nobody to notify\n", __func__);
+ }
+ return 0;
+}
+EXPORT_SYMBOL(rk29sdk_wifi_set_carddetect);
+
+static struct wifi_mem_prealloc wifi_mem_array[PREALLOC_WLAN_SEC_NUM] = {
+ {NULL, (WLAN_SECTION_SIZE_0 + PREALLOC_WLAN_SECTION_HEADER)},
+ {NULL, (WLAN_SECTION_SIZE_1 + PREALLOC_WLAN_SECTION_HEADER)},
+ {NULL, (WLAN_SECTION_SIZE_2 + PREALLOC_WLAN_SECTION_HEADER)},
+ {NULL, (WLAN_SECTION_SIZE_3 + PREALLOC_WLAN_SECTION_HEADER)}
+};
+
+static void *rk29sdk_mem_prealloc(int section, unsigned long size)
+{
+ if (section == PREALLOC_WLAN_SEC_NUM)
+ return wlan_static_skb;
+
+ if ((section < 0) || (section > PREALLOC_WLAN_SEC_NUM))
+ return NULL;
+
+ if (wifi_mem_array[section].size < size)
+ return NULL;
+
+ return wifi_mem_array[section].mem_ptr;
+}
+
+int __init rk29sdk_init_wifi_mem(void)
+{
+ int i;
+ int j;
+
+ for (i = 0 ; i < WLAN_SKB_BUF_NUM ; i++) {
+ wlan_static_skb[i] = dev_alloc_skb(
+ ((i < (WLAN_SKB_BUF_NUM / 2)) ? 4096 : 8192));
+
+ if (!wlan_static_skb[i])
+ goto err_skb_alloc;
+ }
+
+ for (i = 0 ; i < PREALLOC_WLAN_SEC_NUM ; i++) {
+ wifi_mem_array[i].mem_ptr =
+ kmalloc(wifi_mem_array[i].size, GFP_KERNEL);
+
+ if (!wifi_mem_array[i].mem_ptr)
+ goto err_mem_alloc;
+ }
+ return 0;
+
+err_mem_alloc:
+ pr_err("Failed to mem_alloc for WLAN\n");
+ for (j = 0 ; j < i ; j++)
+ kfree(wifi_mem_array[j].mem_ptr);
+
+ i = WLAN_SKB_BUF_NUM;
+
+err_skb_alloc:
+ pr_err("Failed to skb_alloc for WLAN\n");
+ for (j = 0 ; j < i ; j++)
+ dev_kfree_skb(wlan_static_skb[j]);
+
+ return -ENOMEM;
+}
+
+static struct wifi_platform_data rk29sdk_wifi_control = {
+ .set_power = rk29sdk_wifi_power,
+ .set_reset = rk29sdk_wifi_reset,
+ .set_carddetect = rk29sdk_wifi_set_carddetect,
+ .mem_prealloc = rk29sdk_mem_prealloc,
+};
+static struct platform_device rk29sdk_wifi_device = {
+ .name = "bcm4329_wlan",
+ .id = 1,
+ .dev = {
+ .platform_data = &rk29sdk_wifi_control,
+ },
+};
+#endif
+
+
+/* bluetooth rfkill device */
+static struct platform_device rk29sdk_rfkill = {
+ .name = "rk29sdk_rfkill",
+ .id = -1,
+};
+
+
+#ifdef CONFIG_VIVANTE
+static struct resource resources_gpu[] = {
+ [0] = {
+ .name = "gpu_irq",
+ .start = IRQ_GPU,
+ .end = IRQ_GPU,
+ .flags = IORESOURCE_IRQ,
+ },
+ [1] = {
+ .name = "gpu_base",
+ .start = RK29_GPU_PHYS,
+ .end = RK29_GPU_PHYS + RK29_GPU_PHYS_SIZE,
+ .flags = IORESOURCE_MEM,
+ },
+ [2] = {
+ .name = "gpu_mem",
+ .start = PMEM_GPU_BASE,
+ .end = PMEM_GPU_BASE + PMEM_GPU_SIZE,
+ .flags = IORESOURCE_MEM,
+ },
+};
+static struct platform_device rk29_device_gpu = {
+ .name = "galcore",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(resources_gpu),
+ .resource = resources_gpu,
+};
+#endif
+#ifdef CONFIG_KEYS_RK29
+extern struct rk29_keys_platform_data rk29_keys_pdata;
+static struct platform_device rk29_device_keys = {
+ .name = "rk29-keypad",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk29_keys_pdata,
+ },
+};
+#endif
+
+static void __init rk29_board_iomux_init(void)
+{
+ #ifdef CONFIG_UART0_RK29
+ rk29_mux_api_set(GPIO1B7_UART0SOUT_NAME, GPIO1L_UART0_SOUT);
+ rk29_mux_api_set(GPIO1B6_UART0SIN_NAME, GPIO1L_UART0_SIN);
+ #ifdef CONFIG_UART0_CTS_RTS_RK29
+ rk29_mux_api_set(GPIO1C1_UART0RTSN_SDMMC1WRITEPRT_NAME, GPIO1H_UART0_RTS_N);
+ rk29_mux_api_set(GPIO1C0_UART0CTSN_SDMMC1DETECTN_NAME, GPIO1H_UART0_CTS_N);
+ #endif
+ #endif
+ #ifdef CONFIG_UART1_RK29
+ rk29_mux_api_set(GPIO2A5_UART1SOUT_NAME, GPIO2L_UART1_SOUT);
+ rk29_mux_api_set(GPIO2A4_UART1SIN_NAME, GPIO2L_UART1_SIN);
+ #endif
+ #ifdef CONFIG_UART2_RK29
+ rk29_mux_api_set(GPIO2B1_UART2SOUT_NAME, GPIO2L_UART2_SOUT);
+ rk29_mux_api_set(GPIO2B0_UART2SIN_NAME, GPIO2L_UART2_SIN);
+ #ifdef CONFIG_UART2_CTS_RTS_RK29
+ rk29_mux_api_set(GPIO2A7_UART2RTSN_NAME, GPIO2L_UART2_RTS_N);
+ rk29_mux_api_set(GPIO2A6_UART2CTSN_NAME, GPIO2L_UART2_CTS_N);
+ #endif
+ #endif
+ #ifdef CONFIG_UART3_RK29
+ rk29_mux_api_set(GPIO2B3_UART3SOUT_NAME, GPIO2L_UART3_SOUT);
+ rk29_mux_api_set(GPIO2B2_UART3SIN_NAME, GPIO2L_UART3_SIN);
+ #ifdef CONFIG_UART3_CTS_RTS_RK29
+ rk29_mux_api_set(GPIO2B5_UART3RTSN_I2C3SCL_NAME, GPIO2L_UART3_RTS_N);
+ rk29_mux_api_set(GPIO2B4_UART3CTSN_I2C3SDA_NAME, GPIO2L_UART3_CTS_N);
+ #endif
+ #endif
+ #ifdef CONFIG_SPIM0_RK29
+ rk29_mux_api_set(GPIO2C0_SPI0CLK_NAME, GPIO2H_SPI0_CLK);
+ rk29_mux_api_set(GPIO2C1_SPI0CSN0_NAME, GPIO2H_SPI0_CSN0);
+ rk29_mux_api_set(GPIO2C2_SPI0TXD_NAME, GPIO2H_SPI0_TXD);
+ rk29_mux_api_set(GPIO2C3_SPI0RXD_NAME, GPIO2H_SPI0_RXD);
+ #endif
+ #ifdef CONFIG_SPIM1_RK29
+ rk29_mux_api_set(GPIO2C4_SPI1CLK_NAME, GPIO2H_SPI1_CLK);
+ rk29_mux_api_set(GPIO2C5_SPI1CSN0_NAME, GPIO2H_SPI1_CSN0);
+ rk29_mux_api_set(GPIO2C6_SPI1TXD_NAME, GPIO2H_SPI1_TXD);
+ rk29_mux_api_set(GPIO2C7_SPI1RXD_NAME, GPIO2H_SPI1_RXD);
+ #endif
+ #ifdef CONFIG_RK29_VMAC
+ rk29_mux_api_set(GPIO4C0_RMIICLKOUT_RMIICLKIN_NAME, GPIO4H_RMII_CLKOUT);
+ rk29_mux_api_set(GPIO4C1_RMIITXEN_MIITXEN_NAME, GPIO4H_RMII_TX_EN);
+ rk29_mux_api_set(GPIO4C2_RMIITXD1_MIITXD1_NAME, GPIO4H_RMII_TXD1);
+ rk29_mux_api_set(GPIO4C3_RMIITXD0_MIITXD0_NAME, GPIO4H_RMII_TXD0);
+ rk29_mux_api_set(GPIO4C4_RMIIRXERR_MIIRXERR_NAME, GPIO4H_RMII_RX_ERR);
+ rk29_mux_api_set(GPIO4C5_RMIICSRDVALID_MIIRXDVALID_NAME, GPIO4H_RMII_CSR_DVALID);
+ rk29_mux_api_set(GPIO4C6_RMIIRXD1_MIIRXD1_NAME, GPIO4H_RMII_RXD1);
+ rk29_mux_api_set(GPIO4C7_RMIIRXD0_MIIRXD0_NAME, GPIO4H_RMII_RXD0);
+
+ rk29_mux_api_set(GPIO0A7_MIIMDCLK_NAME, GPIO0L_MII_MDCLK);
+ rk29_mux_api_set(GPIO0A6_MIIMD_NAME, GPIO0L_MII_MD);
+ #endif
+ #ifdef CONFIG_RK29_PWM_REGULATOR
+ rk29_mux_api_set(REGULATOR_PWM_MUX_NAME,REGULATOR_PWM_MUX_MODE);
+ #endif
+}
+
+static struct platform_device *devices[] __initdata = {
+#ifdef CONFIG_UART1_RK29
+ &rk29_device_uart1,
+#endif
+#ifdef CONFIG_UART0_RK29
+ &rk29_device_uart0,
+#endif
+#ifdef CONFIG_UART2_RK29
+ &rk29_device_uart2,
+#endif
+
+#ifdef CONFIG_RK29_PWM_REGULATOR
+ &rk29_device_pwm_regulator,
+#endif
+#ifdef CONFIG_SPIM0_RK29
+ &rk29xx_device_spi0m,
+#endif
+#ifdef CONFIG_SPIM1_RK29
+ &rk29xx_device_spi1m,
+#endif
+#ifdef CONFIG_ADC_RK29
+ &rk29_device_adc,
+#endif
+#ifdef CONFIG_I2C0_RK29
+ &rk29_device_i2c0,
+#endif
+#ifdef CONFIG_I2C1_RK29
+ &rk29_device_i2c1,
+#endif
+#ifdef CONFIG_I2C2_RK29
+ &rk29_device_i2c2,
+#endif
+#ifdef CONFIG_I2C3_RK29
+ &rk29_device_i2c3,
+#endif
+
+#ifdef CONFIG_SND_RK29_SOC_I2S_2CH
+ &rk29_device_iis_2ch,
+#endif
+#ifdef CONFIG_SND_RK29_SOC_I2S_8CH
+ &rk29_device_iis_8ch,
+#endif
+
+#ifdef CONFIG_KEYS_RK29
+ &rk29_device_keys,
+#endif
+#ifdef CONFIG_SDMMC0_RK29
+ &rk29_device_sdmmc0,
+#endif
+#ifdef CONFIG_SDMMC1_RK29
+ &rk29_device_sdmmc1,
+#endif
+
+#ifdef CONFIG_MTD_NAND_RK29XX
+ &rk29xx_device_nand,
+#endif
+
+#ifdef CONFIG_WIFI_CONTROL_FUNC
+ &rk29sdk_wifi_device,
+#endif
+
+#ifdef CONFIG_BT
+ &rk29sdk_rfkill,
+#endif
+
+#ifdef CONFIG_MTD_NAND_RK29
+ &rk29_device_nand,
+#endif
+
+#ifdef CONFIG_FB_RK29
+ &rk29_device_fb,
+ &rk29_device_dma_cpy,
+#endif
+#ifdef CONFIG_BACKLIGHT_RK29_BL
+ &rk29_device_backlight,
+#endif
+#ifdef CONFIG_RK29_VMAC
+ &rk29_device_vmac,
+#endif
+#ifdef CONFIG_VIVANTE
+ &rk29_device_gpu,
+#endif
+#ifdef CONFIG_VIDEO_RK29
+ &rk29_device_camera, /* ddl@rock-chips.com : camera support */
+ #if (SENSOR_IIC_ADDR_0 != 0x00)
+ &rk29_soc_camera_pdrv_0,
+ #endif
+ &rk29_soc_camera_pdrv_1,
+ &android_pmem_cam_device,
+#endif
+ &android_pmem_device,
+ &rk29_vpu_mem_device,
+#ifdef CONFIG_USB20_OTG
+ &rk29_device_usb20_otg,
+#endif
+#ifdef CONFIG_USB20_HOST
+ &rk29_device_usb20_host,
+#endif
+#ifdef CONFIG_USB11_HOST
+ &rk29_device_usb11_host,
+#endif
+#ifdef CONFIG_USB_ANDROID
+ &android_usb_device,
+ &usb_mass_storage_device,
+#endif
+#ifdef CONFIG_RK29_IPP
+ &rk29_device_ipp,
+#endif
+#ifdef CONFIG_VIDEO_RK29XX_VOUT
+ &rk29_v4l2_output_devce,
+#endif
+};
+
+/*****************************************************************************************
+ * spi devices
+ * author: cmc@rock-chips.com
+ *****************************************************************************************/
+static int rk29_vmac_register_set(void)
+{
+ //config rk29 vmac as rmii, 100MHz
+ u32 value= readl(RK29_GRF_BASE + 0xbc);
+ value = (value & 0xfff7ff) | (0x400);
+ writel(value, RK29_GRF_BASE + 0xbc);
+ return 0;
+}
+
+static int rk29_rmii_io_init(void)
+{
+ int err;
+
+ //phy power gpio
+ err = gpio_request(RK29_PIN6_PB0, "phy_power_en");
+ if (err) {
+ gpio_free(RK29_PIN6_PB0);
+ printk("-------request RK29_PIN6_PB0 fail--------\n");
+ return -1;
+ }
+ //phy power down
+ gpio_direction_output(RK29_PIN6_PB0, GPIO_LOW);
+ gpio_set_value(RK29_PIN6_PB0, GPIO_LOW);
+
+ return 0;
+}
+
+static int rk29_rmii_io_deinit(void)
+{
+ //phy power down
+ gpio_direction_output(RK29_PIN6_PB0, GPIO_LOW);
+ gpio_set_value(RK29_PIN6_PB0, GPIO_LOW);
+ //free
+ gpio_free(RK29_PIN6_PB0);
+ return 0;
+}
+
+static int rk29_rmii_power_control(int enable)
+{
+ if (enable) {
+ //enable phy power
+ gpio_direction_output(RK29_PIN6_PB0, GPIO_HIGH);
+ gpio_set_value(RK29_PIN6_PB0, GPIO_HIGH);
+ }
+ else {
+ gpio_direction_output(RK29_PIN6_PB0, GPIO_LOW);
+ gpio_set_value(RK29_PIN6_PB0, GPIO_LOW);
+ }
+ return 0;
+}
+
+struct rk29_vmac_platform_data rk29_vmac_pdata = {
+ .vmac_register_set = rk29_vmac_register_set,
+ .rmii_io_init = rk29_rmii_io_init,
+ .rmii_io_deinit = rk29_rmii_io_deinit,
+ .rmii_power_control = rk29_rmii_power_control,
+};
+
+/*****************************************************************************************
+ * spi devices
+ * author: cmc@rock-chips.com
+ *****************************************************************************************/
+#define SPI_CHIPSELECT_NUM 2
+static struct spi_cs_gpio rk29xx_spi0_cs_gpios[SPI_CHIPSELECT_NUM] = {
+ {
+ .name = "spi0 cs0",
+ .cs_gpio = RK29_PIN2_PC1,
+ .cs_iomux_name = NULL,
+ },
+ {
+ .name = "spi0 cs1",
+ .cs_gpio = RK29_PIN1_PA4,
+ .cs_iomux_name = GPIO1A4_EMMCWRITEPRT_SPI0CS1_NAME,//if no iomux,set it NULL
+ .cs_iomux_mode = GPIO1L_SPI0_CSN1,
+ }
+};
+
+static struct spi_cs_gpio rk29xx_spi1_cs_gpios[SPI_CHIPSELECT_NUM] = {
+ {
+ .name = "spi1 cs0",
+ .cs_gpio = RK29_PIN2_PC5,
+ .cs_iomux_name = NULL,
+ },
+ {
+ .name = "spi1 cs1",
+ .cs_gpio = RK29_PIN1_PA3,
+ .cs_iomux_name = GPIO1A3_EMMCDETECTN_SPI1CS1_NAME,//if no iomux,set it NULL
+ .cs_iomux_mode = GPIO1L_SPI1_CSN1,
+ }
+};
+
+static int spi_io_init(struct spi_cs_gpio *cs_gpios, int cs_num)
+{
+#if 1
+ int i,j,ret;
+
+ //cs
+ if (cs_gpios) {
+ for (i=0; i<cs_num; i++) {
+ rk29_mux_api_set(cs_gpios[i].cs_iomux_name, cs_gpios[i].cs_iomux_mode);
+ ret = gpio_request(cs_gpios[i].cs_gpio, cs_gpios[i].name);
+ if (ret) {
+ for (j=0;j<i;j++) {
+ gpio_free(cs_gpios[j].cs_gpio);
+ //rk29_mux_api_mode_resume(cs_gpios[j].cs_iomux_name);
+ }
+ printk("[fun:%s, line:%d], gpio request err\n", __func__, __LINE__);
+ return -1;
+ }
+ gpio_direction_output(cs_gpios[i].cs_gpio, GPIO_HIGH);
+ }
+ }
+#endif
+ return 0;
+}
+
+static int spi_io_deinit(struct spi_cs_gpio *cs_gpios, int cs_num)
+{
+#if 1
+ int i;
+
+ if (cs_gpios) {
+ for (i=0; i<cs_num; i++) {
+ gpio_free(cs_gpios[i].cs_gpio);
+ //rk29_mux_api_mode_resume(cs_gpios[i].cs_iomux_name);
+ }
+ }
+#endif
+ return 0;
+}
+
+static int spi_io_fix_leakage_bug(void)
+{
+#if 0
+ gpio_direction_output(RK29_PIN2_PC1, GPIO_LOW);
+#endif
+ return 0;
+}
+
+static int spi_io_resume_leakage_bug(void)
+{
+#if 0
+ gpio_direction_output(RK29_PIN2_PC1, GPIO_HIGH);
+#endif
+ return 0;
+}
+
+struct rk29xx_spi_platform_data rk29xx_spi0_platdata = {
+ .num_chipselect = SPI_CHIPSELECT_NUM,
+ .chipselect_gpios = rk29xx_spi0_cs_gpios,
+ .io_init = spi_io_init,
+ .io_deinit = spi_io_deinit,
+ .io_fix_leakage_bug = spi_io_fix_leakage_bug,
+ .io_resume_leakage_bug = spi_io_resume_leakage_bug,
+};
+
+struct rk29xx_spi_platform_data rk29xx_spi1_platdata = {
+ .num_chipselect = SPI_CHIPSELECT_NUM,
+ .chipselect_gpios = rk29xx_spi1_cs_gpios,
+ .io_init = spi_io_init,
+ .io_deinit = spi_io_deinit,
+ .io_fix_leakage_bug = spi_io_fix_leakage_bug,
+ .io_resume_leakage_bug = spi_io_resume_leakage_bug,
+};
+
+/*****************************************************************************************
+ * xpt2046 touch panel
+ * author: cmc@rock-chips.com
+ *****************************************************************************************/
+#define XPT2046_GPIO_INT RK29_PIN0_PA3
+#define DEBOUNCE_REPTIME 3
+
+#if defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_SPI)
+static struct xpt2046_platform_data xpt2046_info = {
+ .model = 2046,
+ .keep_vref_on = 1,
+ .swap_xy = 0,
+ .x_min = 0,
+ .x_max = 320,
+ .y_min = 0,
+ .y_max = 480,
+ .debounce_max = 7,
+ .debounce_rep = DEBOUNCE_REPTIME,
+ .debounce_tol = 20,
+ .gpio_pendown = XPT2046_GPIO_INT,
+ .penirq_recheck_delay_usecs = 1,
+};
+#elif defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_CBN_SPI)
+static struct xpt2046_platform_data xpt2046_info = {
+ .model = 2046,
+ .keep_vref_on = 1,
+ .swap_xy = 0,
+ .x_min = 0,
+ .x_max = 320,
+ .y_min = 0,
+ .y_max = 480,
+ .debounce_max = 7,
+ .debounce_rep = DEBOUNCE_REPTIME,
+ .debounce_tol = 20,
+ .gpio_pendown = XPT2046_GPIO_INT,
+ .penirq_recheck_delay_usecs = 1,
+};
+#elif defined(CONFIG_TOUCHSCREEN_XPT2046_SPI)
+static struct xpt2046_platform_data xpt2046_info = {
+ .model = 2046,
+ .keep_vref_on = 1,
+ .swap_xy = 1,
+ .x_min = 0,
+ .x_max = 800,
+ .y_min = 0,
+ .y_max = 480,
+ .debounce_max = 7,
+ .debounce_rep = DEBOUNCE_REPTIME,
+ .debounce_tol = 20,
+ .gpio_pendown = XPT2046_GPIO_INT,
+
+ .penirq_recheck_delay_usecs = 1,
+};
+#elif defined(CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI)
+static struct xpt2046_platform_data xpt2046_info = {
+ .model = 2046,
+ .keep_vref_on = 1,
+ .swap_xy = 1,
+ .x_min = 0,
+ .x_max = 800,
+ .y_min = 0,
+ .y_max = 480,
+ .debounce_max = 7,
+ .debounce_rep = DEBOUNCE_REPTIME,
+ .debounce_tol = 20,
+ .gpio_pendown = XPT2046_GPIO_INT,
+
+ .penirq_recheck_delay_usecs = 1,
+};
+#endif
+
+static struct spi_board_info board_spi_devices[] = {
+#if defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_SPI) || defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_CBN_SPI)\
+ ||defined(CONFIG_TOUCHSCREEN_XPT2046_SPI) || defined(CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI)
+ {
+ .modalias = "xpt2046_ts",
+ .chip_select = 0,
+ .max_speed_hz = 125 * 1000 * 26,/* (max sample rate @ 3V) * (cmd + data + overhead) */
+ .bus_num = 0,
+ .irq = XPT2046_GPIO_INT,
+ .platform_data = &xpt2046_info,
+ },
+#endif
+};
+
+
+static void __init rk29_gic_init_irq(void)
+{
+ gic_dist_init(0, (void __iomem *)RK29_GICPERI_BASE, 32);
+ gic_cpu_init(0, (void __iomem *)RK29_GICCPU_BASE);
+}
+
+static void __init machine_rk29_init_irq(void)
+{
+ rk29_gic_init_irq();
+ rk29_gpio_init();
+}
+
+#define POWER_ON_PIN RK29_PIN4_PA4
+static void rk29_pm_power_off(void)
+{
+ printk(KERN_ERR "rk29_pm_power_off start...\n");
+ gpio_direction_output(POWER_ON_PIN, GPIO_LOW);
+ while (1);
+}
+
+static void __init machine_rk29_board_init(void)
+{
+ rk29_board_iomux_init();
+
+ gpio_request(POWER_ON_PIN,"poweronpin");
+ gpio_set_value(POWER_ON_PIN, GPIO_HIGH);
+ gpio_direction_output(POWER_ON_PIN, GPIO_HIGH);
+ pm_power_off = rk29_pm_power_off;
+
+#ifdef CONFIG_WIFI_CONTROL_FUNC
+ rk29sdk_wifi_bt_gpio_control_init();
+#endif
+
+ platform_add_devices(devices, ARRAY_SIZE(devices));
+#ifdef CONFIG_I2C0_RK29
+ i2c_register_board_info(default_i2c0_data.bus_num, board_i2c0_devices,
+ ARRAY_SIZE(board_i2c0_devices));
+#endif
+#ifdef CONFIG_I2C1_RK29
+ i2c_register_board_info(default_i2c1_data.bus_num, board_i2c1_devices,
+ ARRAY_SIZE(board_i2c1_devices));
+#endif
+#ifdef CONFIG_I2C2_RK29
+ i2c_register_board_info(default_i2c2_data.bus_num, board_i2c2_devices,
+ ARRAY_SIZE(board_i2c2_devices));
+#endif
+#ifdef CONFIG_I2C3_RK29
+ i2c_register_board_info(default_i2c3_data.bus_num, board_i2c3_devices,
+ ARRAY_SIZE(board_i2c3_devices));
+#endif
+
+ spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices));
+
+ rk29sdk_init_wifi_mem();
+}
+
+static void __init machine_rk29_fixup(struct machine_desc *desc, struct tag *tags,
+ char **cmdline, struct meminfo *mi)
+{
+ mi->nr_banks = 1;
+ mi->bank[0].start = RK29_SDRAM_PHYS;
+ mi->bank[0].node = PHYS_TO_NID(RK29_SDRAM_PHYS);
+ mi->bank[0].size = LINUX_SIZE;
+}
+
+static void __init machine_rk29_mapio(void)
+{
+ rk29_map_common_io();
+ rk29_sram_init();
+ rk29_clock_init();
+ rk29_iomux_init();
+}
+
+MACHINE_START(RK29, "RK29board")
+ /* UART for LL DEBUG */
+ .phys_io = RK29_UART1_PHYS,
+ .io_pg_offst = ((RK29_UART1_BASE) >> 18) & 0xfffc,
+ .boot_params = RK29_SDRAM_PHYS + 0x88000,
+ .fixup = machine_rk29_fixup,
+ .map_io = machine_rk29_mapio,
+ .init_irq = machine_rk29_init_irq,
+ .init_machine = machine_rk29_board_init,
+ .timer = &rk29_timer,
+MACHINE_END
To have support for your specific gsesnor you will have to
select the proper drivers which depend on this option.
+config GS_FIH
+ bool "gs_fih"
+ depends on G_SENSOR_DEVICE
+ default y
+ help
+ To have support for your specific gsesnor you will have to
+ select the proper drivers which depend on this option.
+
endif
obj-$(CONFIG_GS_MMA7660) += mma7660.o
obj-$(CONFIG_GS_MMA8452) += mma8452.o
+obj-$(CONFIG_GS_FIH) += gs_fih.o
--- /dev/null
+/* drivers/i2c/chips/mma8452.c - mma8452 compass driver
+ *
+ * Copyright (C) 2007-2008 HTC Corporation.
+ * Author: Hou-Kun Chen <houkun.chen@gmail.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/interrupt.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/irq.h>
+#include <linux/miscdevice.h>
+#include <linux/gpio.h>
+#include <asm/uaccess.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/workqueue.h>
+#include <linux/freezer.h>
+#include <linux/mma8452.h>
+#include <mach/gpio.h>
+#include <mach/board.h>
+#ifdef CONFIG_HAS_EARLYSUSPEND
+#include <linux/earlysuspend.h>
+#endif
+
+#if 0
+#define mmaprintk(x...) printk(x)
+#else
+#define mmaprintk(x...)
+#endif
+static int mma8452_probe(struct i2c_client *client, const struct i2c_device_id *id);
+
+#define MMA8452_SPEED 200 * 1000
+#define MMA8452_DEVID 0x1a
+/* Addresses to scan -- protected by sense_data_mutex */
+//static char sense_data[RBUFF_SIZE + 1];
+static struct i2c_client *this_client;
+static struct miscdevice mma8452_device;
+
+static DECLARE_WAIT_QUEUE_HEAD(data_ready_wq);
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+static struct early_suspend mma8452_early_suspend;
+#endif
+static int revision = -1;
+/* AKM HW info */
+static ssize_t gsensor_vendor_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ ssize_t ret = 0;
+
+ sprintf(buf, "%#x\n", revision);
+ ret = strlen(buf) + 1;
+
+ return ret;
+}
+
+static DEVICE_ATTR(vendor, 0444, gsensor_vendor_show, NULL);
+
+static struct kobject *android_gsensor_kobj;
+
+static int gsensor_sysfs_init(void)
+{
+ int ret ;
+
+ android_gsensor_kobj = kobject_create_and_add("android_gsensor", NULL);
+ if (android_gsensor_kobj == NULL) {
+ mmaprintk(KERN_ERR
+ "MMA8452 gsensor_sysfs_init:"\
+ "subsystem_register failed\n");
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ ret = sysfs_create_file(android_gsensor_kobj, &dev_attr_vendor.attr);
+ if (ret) {
+ mmaprintk(KERN_ERR
+ "MMA8452 gsensor_sysfs_init:"\
+ "sysfs_create_group failed\n");
+ goto err4;
+ }
+
+ return 0 ;
+err4:
+ kobject_del(android_gsensor_kobj);
+err:
+ return ret ;
+}
+
+static int mma8452_rx_data(struct i2c_client *client, char *rxData, int length)
+{
+ int ret = 0;
+ char reg = rxData[0];
+ ret = i2c_master_reg8_recv(client, reg, rxData, length, MMA8452_SPEED);
+ return (ret > 0)? 0 : ret;
+}
+
+static int mma8452_tx_data(struct i2c_client *client, char *txData, int length)
+{
+ int ret = 0;
+ char reg = txData[0];
+ ret = i2c_master_reg8_send(client, reg, &txData[1], length-1, MMA8452_SPEED);
+ return (ret > 0)? 0 : ret;
+}
+
+static char mma845x_read_reg(struct i2c_client *client,int addr)
+{
+ char tmp;
+ int ret = 0;
+
+ tmp = addr;
+// ret = mma8452_tx_data(client, &tmp, 1);
+ ret = mma8452_rx_data(client, &tmp, 1);
+ return tmp;
+}
+
+static int mma845x_write_reg(struct i2c_client *client,int addr,int value)
+{
+ char buffer[3];
+ int ret = 0;
+
+ buffer[0] = addr;
+ buffer[1] = value;
+ ret = mma8452_tx_data(client, &buffer[0], 2);
+ return ret;
+}
+
+
+static char mma8452_get_devid(struct i2c_client *client)
+{
+ printk("mma8452 devid:%x\n",mma845x_read_reg(client,MMA8452_REG_WHO_AM_I));
+ return mma845x_read_reg(client,MMA8452_REG_WHO_AM_I);
+}
+
+static int mma845x_active(struct i2c_client *client,int enable)
+{
+ int tmp;
+ int ret = 0;
+
+ tmp = mma845x_read_reg(client,MMA8452_REG_CTRL_REG1);
+ if(enable)
+ tmp |=ACTIVE_MASK;
+ else
+ tmp &=~ACTIVE_MASK;
+ mmaprintk("mma845x_active %s (0x%x)\n",enable?"active":"standby",tmp);
+ ret = mma845x_write_reg(client,MMA8452_REG_CTRL_REG1,tmp);
+ return ret;
+}
+
+static int mma8452_start_test(struct i2c_client *client)
+{
+ int ret = 0;
+ int tmp;
+
+ mmaprintk("-------------------------mma8452 start test------------------------\n");
+
+ /* standby */
+ mma845x_active(client,0);
+ mmaprintk("mma8452 MMA8452_REG_SYSMOD:%x\n",mma845x_read_reg(client,MMA8452_REG_SYSMOD));
+
+ /* disable FIFO FMODE = 0*/
+ ret = mma845x_write_reg(client,MMA8452_REG_F_SETUP,0);
+ mmaprintk("mma8452 MMA8452_REG_F_SETUP:%x\n",mma845x_read_reg(client,MMA8452_REG_F_SETUP));
+
+ /* set full scale range to 2g */
+ ret = mma845x_write_reg(client,MMA8452_REG_XYZ_DATA_CFG,0);
+ mmaprintk("mma8452 MMA8452_REG_XYZ_DATA_CFG:%x\n",mma845x_read_reg(client,MMA8452_REG_XYZ_DATA_CFG));
+
+ /* set bus 8bit/14bit(FREAD = 1,FMODE = 0) ,data rate*/
+ tmp = (MMA8452_RATE_12P5<< MMA8452_RATE_SHIFT) | FREAD_MASK;
+ ret = mma845x_write_reg(client,MMA8452_REG_CTRL_REG1,tmp);
+ mmaprintk("mma8452 MMA8452_REG_CTRL_REG1:%x\n",mma845x_read_reg(client,MMA8452_REG_CTRL_REG1));
+
+ mmaprintk("mma8452 MMA8452_REG_SYSMOD:%x\n",mma845x_read_reg(client,MMA8452_REG_SYSMOD));
+
+ ret = mma845x_write_reg(client,MMA8452_REG_CTRL_REG3,5);
+ mmaprintk("mma8452 MMA8452_REG_CTRL_REG3:%x\n",mma845x_read_reg(client,MMA8452_REG_CTRL_REG3));
+
+ ret = mma845x_write_reg(client,MMA8452_REG_CTRL_REG4,1);
+ mmaprintk("mma8452 MMA8452_REG_CTRL_REG4:%x\n",mma845x_read_reg(client,MMA8452_REG_CTRL_REG4));
+
+ ret = mma845x_write_reg(client,MMA8452_REG_CTRL_REG5,1);
+ mmaprintk("mma8452 MMA8452_REG_CTRL_REG5:%x\n",mma845x_read_reg(client,MMA8452_REG_CTRL_REG5));
+
+ mmaprintk("mma8452 MMA8452_REG_SYSMOD:%x\n",mma845x_read_reg(client,MMA8452_REG_SYSMOD));
+ mma845x_active(client,1);
+ mmaprintk("mma8452 MMA8452_REG_SYSMOD:%x\n",mma845x_read_reg(client,MMA8452_REG_SYSMOD));
+
+ enable_irq(client->irq);
+ msleep(50);
+
+ return ret;
+}
+
+static int mma8452_start_dev(struct i2c_client *client, char rate)
+{
+ int ret = 0;
+ int tmp;
+ struct mma8452_data *mma8452 = (struct mma8452_data *)i2c_get_clientdata(client);
+
+ mmaprintk("-------------------------mma8452 start ------------------------\n");
+ /* standby */
+ mma845x_active(client,0);
+ mmaprintk("mma8452 MMA8452_REG_SYSMOD:%x\n",mma845x_read_reg(client,MMA8452_REG_SYSMOD));
+
+ /* disable FIFO FMODE = 0*/
+ ret = mma845x_write_reg(client,MMA8452_REG_F_SETUP,0);
+ mmaprintk("mma8452 MMA8452_REG_F_SETUP:%x\n",mma845x_read_reg(client,MMA8452_REG_F_SETUP));
+
+ /* set full scale range to 2g */
+ ret = mma845x_write_reg(client,MMA8452_REG_XYZ_DATA_CFG,0);
+ mmaprintk("mma8452 MMA8452_REG_XYZ_DATA_CFG:%x\n",mma845x_read_reg(client,MMA8452_REG_XYZ_DATA_CFG));
+
+ /* set bus 8bit/14bit(FREAD = 1,FMODE = 0) ,data rate*/
+ tmp = (rate<< MMA8452_RATE_SHIFT) | FREAD_MASK;
+ ret = mma845x_write_reg(client,MMA8452_REG_CTRL_REG1,tmp);
+ mma8452->curr_tate = rate;
+ mmaprintk("mma8452 MMA8452_REG_CTRL_REG1:%x\n",mma845x_read_reg(client,MMA8452_REG_CTRL_REG1));
+
+ mmaprintk("mma8452 MMA8452_REG_SYSMOD:%x\n",mma845x_read_reg(client,MMA8452_REG_SYSMOD));
+
+ ret = mma845x_write_reg(client,MMA8452_REG_CTRL_REG3,5);
+ mmaprintk("mma8452 MMA8452_REG_CTRL_REG3:%x\n",mma845x_read_reg(client,MMA8452_REG_CTRL_REG3));
+
+ ret = mma845x_write_reg(client,MMA8452_REG_CTRL_REG4,1);
+ mmaprintk("mma8452 MMA8452_REG_CTRL_REG4:%x\n",mma845x_read_reg(client,MMA8452_REG_CTRL_REG4));
+
+ ret = mma845x_write_reg(client,MMA8452_REG_CTRL_REG5,1);
+ mmaprintk("mma8452 MMA8452_REG_CTRL_REG5:%x\n",mma845x_read_reg(client,MMA8452_REG_CTRL_REG5));
+
+ mmaprintk("mma8452 MMA8452_REG_SYSMOD:%x\n",mma845x_read_reg(client,MMA8452_REG_SYSMOD));
+ mma845x_active(client,1);
+ mmaprintk("mma8452 MMA8452_REG_SYSMOD:%x\n",mma845x_read_reg(client,MMA8452_REG_SYSMOD));
+
+ enable_irq(client->irq);
+ return ret;
+
+}
+
+static int mma8452_start(struct i2c_client *client, char rate)
+{
+ struct mma8452_data *mma8452 = (struct mma8452_data *)i2c_get_clientdata(client);
+
+ printk("%s::enter\n",__FUNCTION__);
+ if (mma8452->status == MMA8452_OPEN) {
+ return 0;
+ }
+ mma8452->status = MMA8452_OPEN;
+ return mma8452_start_dev(client, rate);
+}
+
+static int mma8452_close_dev(struct i2c_client *client)
+{
+ disable_irq_nosync(client->irq);
+ return mma845x_active(client,0);
+}
+
+static int mma8452_close(struct i2c_client *client)
+{
+ struct mma8452_data *mma8452 = (struct mma8452_data *)i2c_get_clientdata(client);
+ printk("%s::enter\n",__FUNCTION__);
+ mma8452->status = MMA8452_CLOSE;
+
+ return mma8452_close_dev(client);
+}
+
+static int mma8452_reset_rate(struct i2c_client *client, char rate)
+{
+ int ret = 0;
+
+ mmaprintk("\n----------------------------mma8452_reset_rate------------------------\n");
+
+ ret = mma8452_close_dev(client);
+ ret = mma8452_start_dev(client, rate);
+
+ return ret ;
+}
+
+static inline int mma8452_convert_to_int(char value)
+{
+ int result;
+
+ if (value < MMA8452_BOUNDARY) {
+ result = value * MMA8452_GRAVITY_STEP;
+ } else {
+ result = ~(((~value & 0x7f) + 1)* MMA8452_GRAVITY_STEP) + 1;
+ }
+
+ return result;
+}
+
+static void mma8452_report_value(struct i2c_client *client, struct mma8452_axis *axis)
+{
+ struct mma8452_data *mma8452 = i2c_get_clientdata(client);
+ //struct mma8452_axis *axis = (struct mma8452_axis *)rbuf;
+
+ /* Report acceleration sensor information */
+ input_report_abs(mma8452->input_dev, ABS_X, axis->x);
+ input_report_abs(mma8452->input_dev, ABS_Y, axis->y);
+ input_report_abs(mma8452->input_dev, ABS_Z, axis->z);
+ input_sync(mma8452->input_dev);
+ mmaprintk("Gsensor x==%d y==%d z==%d\n",axis->x,axis->y,axis->z);
+}
+
+static int mma8452_get_data(struct i2c_client *client)
+{
+ char buffer[6];
+ int ret;
+ struct mma8452_axis axis;
+ struct mma8452_platform_data *pdata = pdata = client->dev.platform_data;
+
+ do {
+ memset(buffer, 0, 3);
+ buffer[0] = MMA8452_REG_X_OUT_MSB;
+ ret = mma8452_tx_data(client, &buffer[0], 1);
+ ret = mma8452_rx_data(client, &buffer[0], 3);
+ if (ret < 0)
+ return ret;
+ } while (0);
+
+ mmaprintk("0x%02x 0x%02x 0x%02x \n",buffer[0],buffer[1],buffer[2]);
+
+ axis.x = mma8452_convert_to_int(buffer[0]);
+ axis.y = mma8452_convert_to_int(buffer[1]);
+ axis.z = mma8452_convert_to_int(buffer[2]);
+
+ if(pdata->swap_xy)
+ {
+ axis.y = -axis.y;
+ swap(axis.x,axis.y);
+ }
+ #if defined(CONFIG_MACH_RK29_AIGO)
+ axis.x = -axis.x;
+ #endif
+
+ // mmaprintk( "%s: ------------------mma8452_GetData axis = %d %d %d--------------\n",
+ // __func__, axis.x, axis.y, axis.z);
+
+ //memcpy(sense_data, &axis, sizeof(axis));
+ mma8452_report_value(client, &axis);
+ //atomic_set(&data_ready, 0);
+ //wake_up(&data_ready_wq);
+
+ return 0;
+}
+
+/*
+static int mma8452_trans_buff(char *rbuf, int size)
+{
+ //wait_event_interruptible_timeout(data_ready_wq,
+ // atomic_read(&data_ready), 1000);
+ wait_event_interruptible(data_ready_wq,
+ atomic_read(&data_ready));
+
+ atomic_set(&data_ready, 0);
+ memcpy(rbuf, &sense_data[0], size);
+
+ return 0;
+}
+*/
+
+static int mma8452_open(struct inode *inode, struct file *file)
+{
+ return 0;//nonseekable_open(inode, file);
+}
+
+static int mma8452_release(struct inode *inode, struct file *file)
+{
+ return 0;
+}
+
+static int mma8452_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
+ unsigned long arg)
+{
+
+ void __user *argp = (void __user *)arg;
+ char msg[RBUFF_SIZE + 1];
+ int ret = -1;
+ char rate;
+ struct i2c_client *client = container_of(mma8452_device.parent, struct i2c_client, dev);
+
+ switch (cmd) {
+ case ECS_IOCTL_APP_SET_RATE:
+ if (copy_from_user(&rate, argp, sizeof(rate)))
+ return -EFAULT;
+ break;
+ default:
+ break;
+ }
+
+ switch (cmd) {
+ case ECS_IOCTL_START:
+ ret = mma8452_start(client, MMA8452_RATE_12P5);
+ if (ret < 0)
+ return ret;
+ break;
+ case ECS_IOCTL_CLOSE:
+ ret = mma8452_close(client);
+ if (ret < 0)
+ return ret;
+ break;
+ case ECS_IOCTL_APP_SET_RATE:
+ ret = mma8452_reset_rate(client, rate);
+ if (ret < 0)
+ return ret;
+ break;
+ /*
+ case ECS_IOCTL_GETDATA:
+ ret = mma8452_trans_buff(msg, RBUFF_SIZE);
+ if (ret < 0)
+ return ret;
+ break;
+ */
+ default:
+ return -ENOTTY;
+ }
+
+ switch (cmd) {
+ case ECS_IOCTL_GETDATA:
+ if (copy_to_user(argp, &msg, sizeof(msg)))
+ return -EFAULT;
+ break;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+static void mma8452_work_func(struct work_struct *work)
+{
+ struct mma8452_data *mma8452 = container_of(work, struct mma8452_data, work);
+ struct i2c_client *client = mma8452->client;
+
+ if (mma8452_get_data(client) < 0)
+ mmaprintk(KERN_ERR "MMA8452 mma_work_func: Get data failed\n");
+
+ enable_irq(client->irq);
+}
+
+static void mma8452_delaywork_func(struct work_struct *work)
+{
+ struct delayed_work *delaywork = container_of(work, struct delayed_work, work);
+ struct mma8452_data *mma8452 = container_of(delaywork, struct mma8452_data, delaywork);
+ struct i2c_client *client = mma8452->client;
+
+ if (mma8452_get_data(client) < 0)
+ mmaprintk(KERN_ERR "MMA8452 mma_work_func: Get data failed\n");
+ mmaprintk("%s :int src:0x%02x\n",__FUNCTION__,mma845x_read_reg(mma8452->client,MMA8452_REG_INTSRC));
+ enable_irq(client->irq);
+}
+
+static irqreturn_t mma8452_interrupt(int irq, void *dev_id)
+{
+ struct mma8452_data *mma8452 = (struct mma8452_data *)dev_id;
+
+ disable_irq_nosync(irq);
+ schedule_delayed_work(&mma8452->delaywork, msecs_to_jiffies(30));
+ mmaprintk("%s :enter\n",__FUNCTION__);
+ return IRQ_HANDLED;
+}
+
+static struct file_operations mma8452_fops = {
+ .owner = THIS_MODULE,
+ .open = mma8452_open,
+ .release = mma8452_release,
+ .ioctl = mma8452_ioctl,
+};
+
+static struct miscdevice mma8452_device = {
+ .minor = MISC_DYNAMIC_MINOR,
+ .name = "mma8452_daemon",//"mma8452_daemon",
+ .fops = &mma8452_fops,
+};
+
+static int mma8452_remove(struct i2c_client *client)
+{
+ struct mma8452_data *mma8452 = i2c_get_clientdata(client);
+
+ misc_deregister(&mma8452_device);
+ input_unregister_device(mma8452->input_dev);
+ input_free_device(mma8452->input_dev);
+ free_irq(client->irq, mma8452);
+ kfree(mma8452);
+#ifdef CONFIG_HAS_EARLYSUSPEND
+ unregister_early_suspend(&mma8452_early_suspend);
+#endif
+ this_client = NULL;
+ return 0;
+}
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+static void mma8452_suspend(struct early_suspend *h)
+{
+ struct i2c_client *client = container_of(mma8452_device.parent, struct i2c_client, dev);
+ struct mma8452_data *mma8452 = (struct mma8452_data *)i2c_get_clientdata(client);
+ mmaprintk("Gsensor mma7760 enter suspend mma8452->status %d\n",mma8452->status);
+// if(mma8452->status == MMA8452_OPEN)
+// {
+ //mma8452->status = MMA8452_SUSPEND;
+// mma8452_close_dev(client);
+// }
+}
+
+static void mma8452_resume(struct early_suspend *h)
+{
+ struct i2c_client *client = container_of(mma8452_device.parent, struct i2c_client, dev);
+ struct mma8452_data *mma8452 = (struct mma8452_data *)i2c_get_clientdata(client);
+ mmaprintk("Gsensor mma7760 resume!! mma8452->status %d\n",mma8452->status);
+ //if((mma8452->status == MMA8452_SUSPEND) && (mma8452->status != MMA8452_OPEN))
+// if (mma8452->status == MMA8452_OPEN)
+// mma8452_start_dev(client,mma8452->curr_tate);
+}
+#else
+static int mma8452_suspend(struct i2c_client *client, pm_message_t mesg)
+{
+ int ret;
+ mmaprintk("Gsensor mma7760 enter 2 level suspend mma8452->status %d\n",mma8452->status);
+ struct mma8452_data *mma8452 = (struct mma8452_data *)i2c_get_clientdata(client);
+// if(mma8452->status == MMA8452_OPEN)
+// {
+ // mma8452->status = MMA8452_SUSPEND;
+// ret = mma8452_close_dev(client);
+// }
+ return ret;
+}
+static int mma8452_resume(struct i2c_client *client)
+{
+ int ret;
+ struct mma8452_data *mma8452 = (struct mma8452_data *)i2c_get_clientdata(client);
+ mmaprintk("Gsensor mma7760 2 level resume!! mma8452->status %d\n",mma8452->status);
+// if((mma8452->status == MMA8452_SUSPEND) && (mma8452->status != MMA8452_OPEN))
+//if (mma8452->status == MMA8452_OPEN)
+// ret = mma8452_start_dev(client, mma8452->curr_tate);
+ return ret;
+}
+#endif
+
+static const struct i2c_device_id mma8452_id[] = {
+ {"gs_mma8452", 0},
+ { }
+};
+
+static struct i2c_driver mma8452_driver = {
+ .driver = {
+ .name = "gs_mma8452",
+ },
+ .id_table = mma8452_id,
+ .probe = mma8452_probe,
+ .remove = __devexit_p(mma8452_remove),
+#ifndef CONFIG_HAS_EARLYSUSPEND
+ .suspend = &mma8452_suspend,
+ .resume = &mma8452_resume,
+#endif
+};
+
+
+static int mma8452_init_client(struct i2c_client *client)
+{
+ struct mma8452_data *mma8452;
+ int ret;
+ mma8452 = i2c_get_clientdata(client);
+ mmaprintk("gpio_to_irq(%d) is %d\n",client->irq,gpio_to_irq(client->irq));
+ if ( !gpio_is_valid(client->irq)) {
+ mmaprintk("+++++++++++gpio_is_invalid\n");
+ return -EINVAL;
+ }
+ ret = gpio_request(client->irq, "mma8452_int");
+ if (ret) {
+ mmaprintk( "failed to request mma7990_trig GPIO%d\n",gpio_to_irq(client->irq));
+ return ret;
+ }
+ ret = gpio_direction_input(client->irq);
+ if (ret) {
+ mmaprintk("failed to set mma7990_trig GPIO gpio input\n");
+ return ret;
+ }
+ gpio_pull_updown(client->irq, GPIOPullUp);
+ client->irq = gpio_to_irq(client->irq);
+ ret = request_irq(client->irq, mma8452_interrupt, IRQF_TRIGGER_LOW, client->dev.driver->name, mma8452);
+ mmaprintk("request irq is %d,ret is 0x%x\n",client->irq,ret);
+ if (ret ) {
+ mmaprintk(KERN_ERR "mma8452_init_client: request irq failed,ret is %d\n",ret);
+ return ret;
+ }
+ disable_irq(client->irq);
+ init_waitqueue_head(&data_ready_wq);
+
+ return 0;
+}
+
+static int mma8452_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+ struct mma8452_data *mma8452;
+ struct mma8452_platform_data *pdata = pdata = client->dev.platform_data;
+ int err;
+
+ mmaprintk("%s enter\n",__FUNCTION__);
+
+ mma8452 = kzalloc(sizeof(struct mma8452_data), GFP_KERNEL);
+ if (!mma8452) {
+ mmaprintk("[mma8452]:alloc data failed.\n");
+ err = -ENOMEM;
+ goto exit_alloc_data_failed;
+ }
+
+ INIT_WORK(&mma8452->work, mma8452_work_func);
+ INIT_DELAYED_WORK(&mma8452->delaywork, mma8452_delaywork_func);
+
+ mma8452->client = client;
+ i2c_set_clientdata(client, mma8452);
+
+ this_client = client;
+
+ err = mma8452_init_client(client);
+ if (err < 0) {
+ mmaprintk(KERN_ERR
+ "mma8452_probe: mma8452_init_client failed\n");
+ goto exit_request_gpio_irq_failed;
+ }
+
+ mma8452->input_dev = input_allocate_device();
+ if (!mma8452->input_dev) {
+ err = -ENOMEM;
+ mmaprintk(KERN_ERR
+ "mma8452_probe: Failed to allocate input device\n");
+ goto exit_input_allocate_device_failed;
+ }
+
+ set_bit(EV_ABS, mma8452->input_dev->evbit);
+
+ /* x-axis acceleration */
+ input_set_abs_params(mma8452->input_dev, ABS_X, -20000, 20000, 0, 0); //2g full scale range
+ /* y-axis acceleration */
+ input_set_abs_params(mma8452->input_dev, ABS_Y, -20000, 20000, 0, 0); //2g full scale range
+ /* z-axis acceleration */
+ input_set_abs_params(mma8452->input_dev, ABS_Z, -20000, 20000, 0, 0); //2g full scale range
+
+ mma8452->input_dev->name = "compass";
+ mma8452->input_dev->dev.parent = &client->dev;
+
+ err = input_register_device(mma8452->input_dev);
+ if (err < 0) {
+ mmaprintk(KERN_ERR
+ "mma8452_probe: Unable to register input device: %s\n",
+ mma8452->input_dev->name);
+ goto exit_input_register_device_failed;
+ }
+
+ mma8452_device.parent = &client->dev;
+ err = misc_register(&mma8452_device);
+ if (err < 0) {
+ mmaprintk(KERN_ERR
+ "mma8452_probe: mmad_device register failed\n");
+ goto exit_misc_device_register_mma8452_device_failed;
+ }
+
+ err = gsensor_sysfs_init();
+ if (err < 0) {
+ mmaprintk(KERN_ERR
+ "mma8452_probe: gsensor sysfs init failed\n");
+ goto exit_gsensor_sysfs_init_failed;
+ }
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+ mma8452_early_suspend.suspend = mma8452_suspend;
+ mma8452_early_suspend.resume = mma8452_resume;
+ mma8452_early_suspend.level = 0x2;
+ register_early_suspend(&mma8452_early_suspend);
+#endif
+ if(MMA8452_DEVID == mma8452_get_devid(this_client))
+ printk(KERN_INFO "mma8452 probe ok\n");
+ else
+ goto exit_gsensor_sysfs_init_failed;
+
+
+ mma8452->status = -1;
+#if 0
+// mma8452_start_test(this_client);
+ mma8452_start(client, MMA8452_RATE_12P5);
+#endif
+ return 0;
+
+exit_gsensor_sysfs_init_failed:
+ misc_deregister(&mma8452_device);
+exit_misc_device_register_mma8452_device_failed:
+ input_unregister_device(mma8452->input_dev);
+exit_input_register_device_failed:
+ input_free_device(mma8452->input_dev);
+exit_input_allocate_device_failed:
+ free_irq(client->irq, mma8452);
+exit_request_gpio_irq_failed:
+ kfree(mma8452);
+exit_alloc_data_failed:
+ ;
+ mmaprintk("%s error\n",__FUNCTION__);
+ return err;
+}
+
+
+static int __init mma8452_i2c_init(void)
+{
+ return i2c_add_driver(&mma8452_driver);
+}
+
+static void __exit mma8452_i2c_exit(void)
+{
+ i2c_del_driver(&mma8452_driver);
+}
+
+module_init(mma8452_i2c_init);
+module_exit(mma8452_i2c_exit);
+
config INPUT_LPSENSOR_CM3602
tristate "l/p sensor input support"
-
+
+config INPUT_LSENSOR_CM3623
+ tristate "CM3623 light sensor input support"
+
+config INPUT_MPU3050
+ tristate "MPU3050 motion proccess unit support"
+
+
config INPUT_PCSPKR
tristate "PC Speaker support"
depends on PCSPKR_PLATFORM
obj-$(CONFIG_INPUT_WISTRON_BTNS) += wistron_btns.o
obj-$(CONFIG_INPUT_WM831X_ON) += wm831x-on.o
obj-$(CONFIG_INPUT_YEALINK) += yealink.o
-
+obj-$(CONFIG_INPUT_LSENSOR_CM3623) += cm3623.o
+obj-$(CONFIG_INPUT_MPU3050) += mpu3050.o
--- /dev/null
+/*
+ * isl29003.c - Linux kernel module for
+ * Intersil ISL29003 ambient light sensor
+ *
+ * See file:Documentation/misc-devices/isl29003
+ *
+ * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
+ *
+ * Based on code written by
+ * Rodolfo Giometti <giometti@linux.it>
+ * Eurotech S.p.A. <info@eurotech.it>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/mutex.h>
+#include <linux/delay.h>
+
+#define ISL29003_DRV_NAME "isl29003"
+#define DRIVER_VERSION "1.0"
+
+#define ISL29003_REG_COMMAND 0x00
+#define ISL29003_ADC_ENABLED (1 << 7)
+#define ISL29003_ADC_PD (1 << 6)
+#define ISL29003_TIMING_INT (1 << 5)
+#define ISL29003_MODE_SHIFT (2)
+#define ISL29003_MODE_MASK (0x3 << ISL29003_MODE_SHIFT)
+#define ISL29003_RES_SHIFT (0)
+#define ISL29003_RES_MASK (0x3 << ISL29003_RES_SHIFT)
+
+#define ISL29003_REG_CONTROL 0x01
+#define ISL29003_INT_FLG (1 << 5)
+#define ISL29003_RANGE_SHIFT (2)
+#define ISL29003_RANGE_MASK (0x3 << ISL29003_RANGE_SHIFT)
+#define ISL29003_INT_PERSISTS_SHIFT (0)
+#define ISL29003_INT_PERSISTS_MASK (0xf << ISL29003_INT_PERSISTS_SHIFT)
+
+#define ISL29003_REG_IRQ_THRESH_HI 0x02
+#define ISL29003_REG_IRQ_THRESH_LO 0x03
+#define ISL29003_REG_LSB_SENSOR 0x04
+#define ISL29003_REG_MSB_SENSOR 0x05
+#define ISL29003_REG_LSB_TIMER 0x06
+#define ISL29003_REG_MSB_TIMER 0x07
+
+#define ISL29003_NUM_CACHABLE_REGS 4
+
+struct isl29003_data {
+ struct i2c_client *client;
+ struct mutex lock;
+ u8 reg_cache[ISL29003_NUM_CACHABLE_REGS];
+ u8 power_state_before_suspend;
+};
+
+static int gain_range[] = {
+ 1000, 4000, 16000, 64000
+};
+
+/*
+ * register access helpers
+ */
+
+static int __isl29003_read_reg(struct i2c_client *client,
+ u32 reg, u8 mask, u8 shift)
+{
+ struct isl29003_data *data = i2c_get_clientdata(client);
+ return (data->reg_cache[reg] & mask) >> shift;
+}
+
+static int __isl29003_write_reg(struct i2c_client *client,
+ u32 reg, u8 mask, u8 shift, u8 val)
+{
+ struct isl29003_data *data = i2c_get_clientdata(client);
+ int ret = 0;
+ u8 tmp;
+
+ if (reg >= ISL29003_NUM_CACHABLE_REGS)
+ return -EINVAL;
+
+ mutex_lock(&data->lock);
+
+ tmp = data->reg_cache[reg];
+ tmp &= ~mask;
+ tmp |= val << shift;
+
+ ret = i2c_smbus_write_byte_data(client, reg, tmp);
+ if (!ret)
+ data->reg_cache[reg] = tmp;
+
+ mutex_unlock(&data->lock);
+ return ret;
+}
+
+/*
+ * internally used functions
+ */
+
+/* range */
+static int isl29003_get_range(struct i2c_client *client)
+{
+ return __isl29003_read_reg(client, ISL29003_REG_CONTROL,
+ ISL29003_RANGE_MASK, ISL29003_RANGE_SHIFT);
+}
+
+static int isl29003_set_range(struct i2c_client *client, int range)
+{
+ return __isl29003_write_reg(client, ISL29003_REG_CONTROL,
+ ISL29003_RANGE_MASK, ISL29003_RANGE_SHIFT, range);
+}
+
+/* resolution */
+static int isl29003_get_resolution(struct i2c_client *client)
+{
+ return __isl29003_read_reg(client, ISL29003_REG_COMMAND,
+ ISL29003_RES_MASK, ISL29003_RES_SHIFT);
+}
+
+static int isl29003_set_resolution(struct i2c_client *client, int res)
+{
+ return __isl29003_write_reg(client, ISL29003_REG_COMMAND,
+ ISL29003_RES_MASK, ISL29003_RES_SHIFT, res);
+}
+
+/* mode */
+static int isl29003_get_mode(struct i2c_client *client)
+{
+ return __isl29003_read_reg(client, ISL29003_REG_COMMAND,
+ ISL29003_RES_MASK, ISL29003_RES_SHIFT);
+}
+
+static int isl29003_set_mode(struct i2c_client *client, int mode)
+{
+ return __isl29003_write_reg(client, ISL29003_REG_COMMAND,
+ ISL29003_RES_MASK, ISL29003_RES_SHIFT, mode);
+}
+
+/* power_state */
+static int isl29003_set_power_state(struct i2c_client *client, int state)
+{
+ return __isl29003_write_reg(client, ISL29003_REG_COMMAND,
+ ISL29003_ADC_ENABLED | ISL29003_ADC_PD, 0,
+ state ? ISL29003_ADC_ENABLED : ISL29003_ADC_PD);
+}
+
+static int isl29003_get_power_state(struct i2c_client *client)
+{
+ struct isl29003_data *data = i2c_get_clientdata(client);
+ u8 cmdreg = data->reg_cache[ISL29003_REG_COMMAND];
+ return ~cmdreg & ISL29003_ADC_PD;
+}
+
+static int isl29003_get_adc_value(struct i2c_client *client)
+{
+ struct isl29003_data *data = i2c_get_clientdata(client);
+ int lsb, msb, range, bitdepth;
+
+ mutex_lock(&data->lock);
+ lsb = i2c_smbus_read_byte_data(client, ISL29003_REG_LSB_SENSOR);
+
+ if (lsb < 0) {
+ mutex_unlock(&data->lock);
+ return lsb;
+ }
+
+ msb = i2c_smbus_read_byte_data(client, ISL29003_REG_MSB_SENSOR);
+ mutex_unlock(&data->lock);
+
+ if (msb < 0)
+ return msb;
+
+ range = isl29003_get_range(client);
+ bitdepth = (4 - isl29003_get_resolution(client)) * 4;
+ return (((msb << 8) | lsb) * gain_range[range]) >> bitdepth;
+}
+
+/*
+ * sysfs layer
+ */
+
+/* range */
+static ssize_t isl29003_show_range(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ return sprintf(buf, "%i\n", isl29003_get_range(client));
+}
+
+static ssize_t isl29003_store_range(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ unsigned long val;
+ int ret;
+
+ if ((strict_strtoul(buf, 10, &val) < 0) || (val > 3))
+ return -EINVAL;
+
+ ret = isl29003_set_range(client, val);
+ if (ret < 0)
+ return ret;
+
+ return count;
+}
+
+static DEVICE_ATTR(range, S_IWUSR | S_IRUGO,
+ isl29003_show_range, isl29003_store_range);
+
+
+/* resolution */
+static ssize_t isl29003_show_resolution(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ return sprintf(buf, "%d\n", isl29003_get_resolution(client));
+}
+
+static ssize_t isl29003_store_resolution(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ unsigned long val;
+ int ret;
+
+ if ((strict_strtoul(buf, 10, &val) < 0) || (val > 3))
+ return -EINVAL;
+
+ ret = isl29003_set_resolution(client, val);
+ if (ret < 0)
+ return ret;
+
+ return count;
+}
+
+static DEVICE_ATTR(resolution, S_IWUSR | S_IRUGO,
+ isl29003_show_resolution, isl29003_store_resolution);
+
+/* mode */
+static ssize_t isl29003_show_mode(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ return sprintf(buf, "%d\n", isl29003_get_mode(client));
+}
+
+static ssize_t isl29003_store_mode(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ unsigned long val;
+ int ret;
+
+ if ((strict_strtoul(buf, 10, &val) < 0) || (val > 2))
+ return -EINVAL;
+
+ ret = isl29003_set_mode(client, val);
+ if (ret < 0)
+ return ret;
+
+ return count;
+}
+
+static DEVICE_ATTR(mode, S_IWUSR | S_IRUGO,
+ isl29003_show_mode, isl29003_store_mode);
+
+
+/* power state */
+static ssize_t isl29003_show_power_state(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ return sprintf(buf, "%d\n", isl29003_get_power_state(client));
+}
+
+static ssize_t isl29003_store_power_state(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ unsigned long val;
+ int ret;
+
+ if ((strict_strtoul(buf, 10, &val) < 0) || (val > 1))
+ return -EINVAL;
+
+ ret = isl29003_set_power_state(client, val);
+ return ret ? ret : count;
+}
+
+static DEVICE_ATTR(power_state, S_IWUSR | S_IRUGO,
+ isl29003_show_power_state, isl29003_store_power_state);
+
+
+/* lux */
+static ssize_t isl29003_show_lux(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+
+ /* No LUX data if not operational */
+ if (!isl29003_get_power_state(client))
+ return -EBUSY;
+
+ return sprintf(buf, "%d\n", isl29003_get_adc_value(client));
+}
+
+static DEVICE_ATTR(lux, S_IRUGO, isl29003_show_lux, NULL);
+
+static struct attribute *isl29003_attributes[] = {
+ &dev_attr_range.attr,
+ &dev_attr_resolution.attr,
+ &dev_attr_mode.attr,
+ &dev_attr_power_state.attr,
+ &dev_attr_lux.attr,
+ NULL
+};
+
+static const struct attribute_group isl29003_attr_group = {
+ .attrs = isl29003_attributes,
+};
+
+static int isl29003_init_client(struct i2c_client *client)
+{
+ struct isl29003_data *data = i2c_get_clientdata(client);
+ int i;
+
+ /* read all the registers once to fill the cache.
+ * if one of the reads fails, we consider the init failed */
+ for (i = 0; i < ARRAY_SIZE(data->reg_cache); i++) {
+ int v = i2c_smbus_read_byte_data(client, i);
+ if (v < 0)
+ return -ENODEV;
+
+ data->reg_cache[i] = v;
+ }
+
+ /* set defaults */
+ isl29003_set_range(client, 0);
+ isl29003_set_resolution(client, 0);
+ isl29003_set_mode(client, 0);
+ isl29003_set_power_state(client, 0);
+
+ return 0;
+}
+
+/*
+ * I2C layer
+ */
+
+static int __devinit isl29003_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
+ struct isl29003_data *data;
+ int err = 0;
+
+ if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
+ return -EIO;
+
+ data = kzalloc(sizeof(struct isl29003_data), GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ data->client = client;
+ i2c_set_clientdata(client, data);
+ mutex_init(&data->lock);
+
+ /* initialize the ISL29003 chip */
+ err = isl29003_init_client(client);
+ if (err)
+ goto exit_kfree;
+
+ /* register sysfs hooks */
+ err = sysfs_create_group(&client->dev.kobj, &isl29003_attr_group);
+ if (err)
+ goto exit_kfree;
+
+ dev_info(&client->dev, "driver version %s enabled\n", DRIVER_VERSION);
+ return 0;
+
+exit_kfree:
+ kfree(data);
+ return err;
+}
+
+static int __devexit isl29003_remove(struct i2c_client *client)
+{
+ sysfs_remove_group(&client->dev.kobj, &isl29003_attr_group);
+ isl29003_set_power_state(client, 0);
+ kfree(i2c_get_clientdata(client));
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int isl29003_suspend(struct i2c_client *client, pm_message_t mesg)
+{
+ struct isl29003_data *data = i2c_get_clientdata(client);
+
+ data->power_state_before_suspend = isl29003_get_power_state(client);
+ return isl29003_set_power_state(client, 0);
+}
+
+static int isl29003_resume(struct i2c_client *client)
+{
+ int i;
+ struct isl29003_data *data = i2c_get_clientdata(client);
+
+ /* restore registers from cache */
+ for (i = 0; i < ARRAY_SIZE(data->reg_cache); i++)
+ if (i2c_smbus_write_byte_data(client, i, data->reg_cache[i]))
+ return -EIO;
+
+ return isl29003_set_power_state(client,
+ data->power_state_before_suspend);
+}
+
+#else
+#define isl29003_suspend NULL
+#define isl29003_resume NULL
+#endif /* CONFIG_PM */
+
+static const struct i2c_device_id isl29003_id[] = {
+ { "isl29003", 0 },
+ {}
+};
+MODULE_DEVICE_TABLE(i2c, isl29003_id);
+
+static struct i2c_driver isl29003_driver = {
+ .driver = {
+ .name = ISL29003_DRV_NAME,
+ .owner = THIS_MODULE,
+ },
+ .suspend = isl29003_suspend,
+ .resume = isl29003_resume,
+ .probe = isl29003_probe,
+ .remove = __devexit_p(isl29003_remove),
+ .id_table = isl29003_id,
+};
+
+static int __init isl29003_init(void)
+{
+ return i2c_add_driver(&isl29003_driver);
+}
+
+static void __exit isl29003_exit(void)
+{
+ i2c_del_driver(&isl29003_driver);
+}
+
+MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>");
+MODULE_DESCRIPTION("ISL29003 ambient light sensor driver");
+MODULE_LICENSE("GPL v2");
+MODULE_VERSION(DRIVER_VERSION);
+
+module_init(isl29003_init);
+module_exit(isl29003_exit);
+
projects / firefly-linux-kernel-4.4.55.git / commitdiff