hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0;
}
+ if ((hdmi->dev_type == RK3328_HDMI ||
+ hdmi->dev_type == RK3228_HDMI) &&
+ drm_match_cea_mode(mode) > 94 &&
+ mode->crtc_clock > 340000 &&
+ !(mode->flags & DRM_MODE_FLAG_420_MASK))
+ mode->flags |= DRM_MODE_FLAG_420;
+
if (mode->flags & DRM_MODE_FLAG_420_MASK) {
hdmi->hdmi_data.enc_in_bus_format =
MEDIA_BUS_FMT_UYYVYY8_0_5X24;
struct drm_connector_state *conn_state)
{
struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
+ struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder);
+
+ if (hdmi->phy) {
+ if (drm_match_cea_mode(&crtc_state->mode) > 94 &&
+ crtc_state->mode.crtc_clock > 340000 &&
+ !(crtc_state->mode.flags & DRM_MODE_FLAG_420_MASK)) {
+ crtc_state->mode.flags |= DRM_MODE_FLAG_420;
+ phy_set_bus_width(hdmi->phy, 4);
+ } else {
+ phy_set_bus_width(hdmi->phy, 8);
+ }
+ }
if (crtc_state->mode.flags & DRM_MODE_FLAG_420_MASK) {
s->output_mode = ROCKCHIP_OUT_MODE_YUV420;