mmc: sdhci: convert sdhci_set_uhs_signaling() into a library function
authorRussell King <rmk+kernel@arm.linux.org.uk>
Fri, 25 Apr 2014 11:59:26 +0000 (12:59 +0100)
committerChris Ball <chris@printf.net>
Thu, 22 May 2014 12:33:11 +0000 (08:33 -0400)
Add sdhci_set_uhs_signaling() and always call the set_uhs_signaling
method.  This avoids quirks being added into sdhci_set_uhs_signaling().

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Markus Pargmann <mpa@pengutronix.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
[Ulf Hansson] Resolved conflict
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
18 files changed:
drivers/mmc/host/sdhci-acpi.c
drivers/mmc/host/sdhci-bcm-kona.c
drivers/mmc/host/sdhci-bcm2835.c
drivers/mmc/host/sdhci-cns3xxx.c
drivers/mmc/host/sdhci-dove.c
drivers/mmc/host/sdhci-of-arasan.c
drivers/mmc/host/sdhci-of-esdhc.c
drivers/mmc/host/sdhci-of-hlwd.c
drivers/mmc/host/sdhci-pci.c
drivers/mmc/host/sdhci-pltfm.c
drivers/mmc/host/sdhci-pxav2.c
drivers/mmc/host/sdhci-pxav3.c
drivers/mmc/host/sdhci-s3c.c
drivers/mmc/host/sdhci-sirf.c
drivers/mmc/host/sdhci-spear.c
drivers/mmc/host/sdhci-tegra.c
drivers/mmc/host/sdhci.c
drivers/mmc/host/sdhci.h

index 323e2a688563bc7b7bd50936207a795d0eab2e94..8ce3c28cb76ed503e9ea16605e059fa93780ea1a 100644 (file)
@@ -106,6 +106,7 @@ static const struct sdhci_ops sdhci_acpi_ops_dflt = {
        .enable_dma = sdhci_acpi_enable_dma,
        .set_bus_width = sdhci_set_bus_width,
        .reset = sdhci_reset,
+       .set_uhs_signaling = sdhci_set_uhs_signaling,
 };
 
 static const struct sdhci_ops sdhci_acpi_ops_int = {
@@ -113,6 +114,7 @@ static const struct sdhci_ops sdhci_acpi_ops_int = {
        .enable_dma = sdhci_acpi_enable_dma,
        .set_bus_width = sdhci_set_bus_width,
        .reset = sdhci_reset,
+       .set_uhs_signaling = sdhci_set_uhs_signaling,
        .hw_reset   = sdhci_acpi_int_hw_reset,
 };
 
index e610811c09b0c38b9e8022c0369690ea34ce3634..dd780c315a638edbfb90dbdae818472f927a0c5e 100644 (file)
@@ -212,6 +212,7 @@ static struct sdhci_ops sdhci_bcm_kona_ops = {
        .platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
        .set_bus_width = sdhci_set_bus_width,
        .reset = sdhci_reset,
+       .set_uhs_signaling = sdhci_set_uhs_signaling,
        .card_event = sdhci_bcm_kona_card_event,
 };
 
index 74906d6008e121aee081746448ab00dc1e5b7bf6..46af9a439d7b48c772f68352253ba23641d756ea 100644 (file)
@@ -136,6 +136,7 @@ static const struct sdhci_ops bcm2835_sdhci_ops = {
        .get_min_clock = bcm2835_sdhci_get_min_clock,
        .set_bus_width = sdhci_set_bus_width,
        .reset = sdhci_reset,
+       .set_uhs_signaling = sdhci_set_uhs_signaling,
 };
 
 static const struct sdhci_pltfm_data bcm2835_sdhci_pdata = {
index 587d73ef33ff0f08a034aa3106454593e8f35143..14b74075589afd5b24ce594bb0b42adf7f5ae1cc 100644 (file)
@@ -81,6 +81,7 @@ static const struct sdhci_ops sdhci_cns3xxx_ops = {
        .set_clock      = sdhci_cns3xxx_set_clock,
        .set_bus_width  = sdhci_set_bus_width,
        .reset          = sdhci_reset,
+       .set_uhs_signaling = sdhci_set_uhs_signaling,
 };
 
 static const struct sdhci_pltfm_data sdhci_cns3xxx_pdata = {
index 8ef4ab52f8e014f547f612575476bd00b691f94e..0d315f4496c89514348fe266a9adac5054028509 100644 (file)
@@ -89,6 +89,7 @@ static const struct sdhci_ops sdhci_dove_ops = {
        .set_clock = sdhci_set_clock,
        .set_bus_width = sdhci_set_bus_width,
        .reset = sdhci_reset,
+       .set_uhs_signaling = sdhci_set_uhs_signaling,
 };
 
 static const struct sdhci_pltfm_data sdhci_dove_pdata = {
index f0ee594f25d1ba79deddf19bbdab1088d4c1bb49..5bd1092310f2e6c1b742ce11e3b590119be66435 100644 (file)
@@ -57,6 +57,7 @@ static struct sdhci_ops sdhci_arasan_ops = {
        .get_timeout_clock = sdhci_arasan_get_timeout_clock,
        .set_bus_width = sdhci_set_bus_width,
        .reset = sdhci_reset,
+       .set_uhs_signaling = sdhci_set_uhs_signaling,
 };
 
 static struct sdhci_pltfm_data sdhci_arasan_pdata = {
index c4f8cd3f83c8394c938d89adc040b12edef5db56..fcaeae5f55b8ff8c24de65a5b8e1da0a4d3853f6 100644 (file)
@@ -309,6 +309,7 @@ static const struct sdhci_ops sdhci_esdhc_ops = {
        .adma_workaround = esdhci_of_adma_workaround,
        .set_bus_width = esdhc_pltfm_set_bus_width,
        .reset = sdhci_reset,
+       .set_uhs_signaling = sdhci_set_uhs_signaling,
 };
 
 static const struct sdhci_pltfm_data sdhci_esdhc_pdata = {
index a4a1f0f2c0a08487b4a7cc099da0caf0aea59e0f..b341661369a20a645ea3356e2d8a71cfb42a9ee0 100644 (file)
@@ -61,6 +61,7 @@ static const struct sdhci_ops sdhci_hlwd_ops = {
        .set_clock = sdhci_set_clock,
        .set_bus_width = sdhci_set_bus_width,
        .reset = sdhci_reset,
+       .set_uhs_signaling = sdhci_set_uhs_signaling,
 };
 
 static const struct sdhci_pltfm_data sdhci_hlwd_pdata = {
index b3a28f6b170e53ce5fe51307fc50d316fa556771..52c42fcc284c4b3dca6cd889b562954d9bfc6352 100644 (file)
@@ -1082,6 +1082,7 @@ static const struct sdhci_ops sdhci_pci_ops = {
        .enable_dma     = sdhci_pci_enable_dma,
        .set_bus_width  = sdhci_pci_set_bus_width,
        .reset          = sdhci_reset,
+       .set_uhs_signaling = sdhci_set_uhs_signaling,
        .hw_reset               = sdhci_pci_hw_reset,
 };
 
index 1fb89f44bd5846179c7a1f3cea5796cbf8bb53b6..7e834fb78f427d2c085dce62956337d126e7e4f3 100644 (file)
@@ -48,6 +48,7 @@ static const struct sdhci_ops sdhci_pltfm_ops = {
        .set_clock = sdhci_set_clock,
        .set_bus_width = sdhci_set_bus_width,
        .reset = sdhci_reset,
+       .set_uhs_signaling = sdhci_set_uhs_signaling,
 };
 
 #ifdef CONFIG_OF
index db5257bf032e3d78dde7831b429ce6d0f8c33fc8..3c0f3c0a1cc86969f5f72dfaa27d6fdc2f083b58 100644 (file)
@@ -116,6 +116,7 @@ static const struct sdhci_ops pxav2_sdhci_ops = {
        .get_max_clock = sdhci_pltfm_clk_get_max_clock,
        .set_bus_width = pxav2_mmc_set_bus_width,
        .reset         = pxav2_reset,
+       .set_uhs_signaling = sdhci_set_uhs_signaling,
 };
 
 #ifdef CONFIG_OF
index 05574104a254a12be36d7dc85c85be9574ea7e0c..f4f128947561266e63b47f74c3af458c22aca27b 100644 (file)
@@ -229,6 +229,7 @@ static const struct sdhci_ops pxav3_sdhci_ops = {
        .get_max_clock = sdhci_pltfm_clk_get_max_clock,
        .set_bus_width = sdhci_set_bus_width,
        .reset = pxav3_reset,
+       .set_uhs_signaling = sdhci_set_uhs_signaling,
 };
 
 static struct sdhci_pltfm_data sdhci_pxav3_pdata = {
index 9e6f1c52982cbdababd2adad0e1447766553b574..781b8a943d38fb715945951a4022dd3e18196e9b 100644 (file)
@@ -371,6 +371,7 @@ static struct sdhci_ops sdhci_s3c_ops = {
        .get_min_clock          = sdhci_s3c_get_min_clock,
        .set_bus_width          = sdhci_s3c_set_bus_width,
        .reset                  = sdhci_reset,
+       .set_uhs_signaling      = sdhci_set_uhs_signaling,
 };
 
 static void sdhci_s3c_notify_change(struct platform_device *dev, int state)
index 3b775348b4702fbe9df2b1357f4067a213881cfd..17004531d089e6c2bce4fc33d319f6fdf3cb377f 100644 (file)
@@ -32,6 +32,7 @@ static struct sdhci_ops sdhci_sirf_ops = {
        .get_max_clock  = sdhci_sirf_get_max_clk,
        .set_bus_width = sdhci_set_bus_width,
        .reset = sdhci_reset,
+       .set_uhs_signaling = sdhci_set_uhs_signaling,
 };
 
 static struct sdhci_pltfm_data sdhci_sirf_pdata = {
index 8bf64ab36720c04ae3520c7e42f195f127976dd6..9d535c7336ef8425ab40bc6d6abea91553f17294 100644 (file)
@@ -41,6 +41,7 @@ static const struct sdhci_ops sdhci_pltfm_ops = {
        .set_clock = sdhci_set_clock,
        .set_bus_width = sdhci_set_bus_width,
        .reset = sdhci_reset,
+       .set_uhs_signaling = sdhci_set_uhs_signaling,
 };
 
 #ifdef CONFIG_OF
index a0a8b5cc3b0cdaa5886ff8b1504bb8dd9990261d..d06b6ff6043219b98f79743551f13b2a7b491e78 100644 (file)
@@ -156,6 +156,7 @@ static const struct sdhci_ops tegra_sdhci_ops = {
        .set_clock  = sdhci_set_clock,
        .set_bus_width = tegra_sdhci_set_bus_width,
        .reset      = tegra_sdhci_reset,
+       .set_uhs_signaling = sdhci_set_uhs_signaling,
 };
 
 static const struct sdhci_pltfm_data sdhci_tegra20_pdata = {
index 69e58d071b331cd5187cd2f0019106b020471bea..0073aae0adcbb6c892879cbcb3ff6c87a001cc1f 100644 (file)
@@ -1404,6 +1404,29 @@ void sdhci_set_bus_width(struct sdhci_host *host, int width)
 }
 EXPORT_SYMBOL_GPL(sdhci_set_bus_width);
 
+void sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned timing)
+{
+       u16 ctrl_2;
+
+       ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+       /* Select Bus Speed Mode for host */
+       ctrl_2 &= ~SDHCI_CTRL_UHS_MASK;
+       if ((timing == MMC_TIMING_MMC_HS200) ||
+           (timing == MMC_TIMING_UHS_SDR104))
+               ctrl_2 |= SDHCI_CTRL_UHS_SDR104;
+       else if (timing == MMC_TIMING_UHS_SDR12)
+               ctrl_2 |= SDHCI_CTRL_UHS_SDR12;
+       else if (timing == MMC_TIMING_UHS_SDR25)
+               ctrl_2 |= SDHCI_CTRL_UHS_SDR25;
+       else if (timing == MMC_TIMING_UHS_SDR50)
+               ctrl_2 |= SDHCI_CTRL_UHS_SDR50;
+       else if ((timing == MMC_TIMING_UHS_DDR50) ||
+                (timing == MMC_TIMING_MMC_DDR52))
+               ctrl_2 |= SDHCI_CTRL_UHS_DDR50;
+       sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
+}
+EXPORT_SYMBOL_GPL(sdhci_set_uhs_signaling);
+
 static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios)
 {
        unsigned long flags;
@@ -1514,26 +1537,7 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios)
                clk &= ~SDHCI_CLOCK_CARD_EN;
                sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 
-               if (host->ops->set_uhs_signaling)
-                       host->ops->set_uhs_signaling(host, ios->timing);
-               else {
-                       ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
-                       /* Select Bus Speed Mode for host */
-                       ctrl_2 &= ~SDHCI_CTRL_UHS_MASK;
-                       if ((ios->timing == MMC_TIMING_MMC_HS200) ||
-                           (ios->timing == MMC_TIMING_UHS_SDR104))
-                               ctrl_2 |= SDHCI_CTRL_UHS_SDR104;
-                       else if (ios->timing == MMC_TIMING_UHS_SDR12)
-                               ctrl_2 |= SDHCI_CTRL_UHS_SDR12;
-                       else if (ios->timing == MMC_TIMING_UHS_SDR25)
-                               ctrl_2 |= SDHCI_CTRL_UHS_SDR25;
-                       else if (ios->timing == MMC_TIMING_UHS_SDR50)
-                               ctrl_2 |= SDHCI_CTRL_UHS_SDR50;
-                       else if ((ios->timing == MMC_TIMING_UHS_DDR50) ||
-                                (ios->timing == MMC_TIMING_MMC_DDR52))
-                               ctrl_2 |= SDHCI_CTRL_UHS_DDR50;
-                       sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
-               }
+               host->ops->set_uhs_signaling(host, ios->timing);
 
                if (!(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN) &&
                                ((ios->timing == MMC_TIMING_UHS_SDR12) ||
index 3179a8053019150251eb2641e2730459da281841..7a35395e5f560bc7eeebc2c610f74a6dda808021 100644 (file)
@@ -403,6 +403,7 @@ static inline bool sdhci_sdio_irq_enabled(struct sdhci_host *host)
 void sdhci_set_clock(struct sdhci_host *host, unsigned int clock);
 void sdhci_set_bus_width(struct sdhci_host *host, int width);
 void sdhci_reset(struct sdhci_host *host, u8 mask);
+void sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned timing);
 
 #ifdef CONFIG_PM
 extern int sdhci_suspend_host(struct sdhci_host *host);