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Silence warning.
author
Eric Christopher
<echristo@apple.com>
Thu, 19 Aug 2010 15:35:27 +0000
(15:35 +0000)
committer
Eric Christopher
<echristo@apple.com>
Thu, 19 Aug 2010 15:35:27 +0000
(15:35 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111518
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/ARM/ARMFastISel.cpp
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diff --git
a/lib/Target/ARM/ARMFastISel.cpp
b/lib/Target/ARM/ARMFastISel.cpp
index 211e319728642817d491c4760aca5649f14254b6..6dbf0fc98ba5e45f28107d7bc5798be7fbfb221e 100644
(file)
--- a/
lib/Target/ARM/ARMFastISel.cpp
+++ b/
lib/Target/ARM/ARMFastISel.cpp
@@
-137,7
+137,7
@@
ARMFastISel::AddOptionalDefs(const MachineInstrBuilder &MIB) {
// Do we optionally set a predicate? Preds is size > 0 iff the predicate
// defines CPSR. All other OptionalDefines in ARM are the CCR register.
- bool CPSR;
+ bool CPSR
= false
;
if (DefinesOptionalPredicate(MI, &CPSR)) {
if (CPSR)
AddDefaultT1CC(MIB);