Fix typo in CodeGenerator doc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167137 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/docs/CodeGenerator.rst b/docs/CodeGenerator.rst
index f387e7f4c541191f0543f184b1e4ffb0cf7c3574..900fb8a81f2156987e40b4406b46fa6fbb03241c 100644 (file)
--- a/docs/CodeGenerator.rst
+++ b/docs/CodeGenerator.rst
@@ -256,10 +256,10 @@ The ``TargetRegisterInfo`` class
 The ``TargetRegisterInfo`` class is used to describe the register file of the
 target and any interactions between the registers.
 
-Registers in the code generator are represented in the code generator by
-unsigned integers.  Physical registers (those that actually exist in the target
-description) are unique small numbers, and virtual registers are generally
-large.  Note that register ``#0`` is reserved as a flag value.
+Registers are represented in the code generator by unsigned integers.  Physical
+registers (those that actually exist in the target description) are unique
+small numbers, and virtual registers are generally large.  Note that
+register ``#0`` is reserved as a flag value.
 
 Each register in the processor description has an associated
 ``TargetRegisterDesc`` entry, which provides a textual name for the register