Prettify formatting of the file, adjust paths to making V8 a subdir of Sparc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16482 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Sparc/Sparc.td b/lib/Target/Sparc/Sparc.td
index b8dff53a57588a7ffd8da5e3718c2a75f10cf7e0..892b9cc350a4b419307e19960e3505293b57a4f1 100644 (file)
--- a/lib/Target/Sparc/Sparc.td
+++ b/lib/Target/Sparc/Sparc.td
@@ -10,26 +10,41 @@
 //
 //===----------------------------------------------------------------------===//
 
-// Get the target-independent interfaces which we are implementing...
-//
-include "../Target.td"
+//===----------------------------------------------------------------------===//
+// Target-independent interfaces which we are implementing
+//===----------------------------------------------------------------------===//
+
+include "../../Target.td"
 
 //===----------------------------------------------------------------------===//
 // Register File Description
 //===----------------------------------------------------------------------===//
 
 include "SparcV8RegisterInfo.td"
+
+//===----------------------------------------------------------------------===//
+// Instruction Descriptions
+//===----------------------------------------------------------------------===//
+
 include "SparcV8InstrInfo.td"
 
 def SparcV8InstrInfo : InstrInfo {
-  let PHIInst  = PHI;
+  let PHIInst = PHI;
+
+  // Define how we want to layout our target-specific information field.
+  let TSFlagsFields = [];
+  let TSFlagsShifts = [];
 }
 
+//===----------------------------------------------------------------------===//
+// Declare the target which we are implementing
+//===----------------------------------------------------------------------===//
+
 def SparcV8 : Target {
   // Pointers are 32-bits in size.
   let PointerType = i32;
 
-  // These regs are nonvolatile across calls:
+  // FIXME: Specify callee-saved registers
   let CalleeSavedRegisters = [];
 
   // Pull in Instruction Info:

diff --git a/lib/Target/SparcV8/SparcV8.td b/lib/Target/SparcV8/SparcV8.td
index b8dff53a57588a7ffd8da5e3718c2a75f10cf7e0..892b9cc350a4b419307e19960e3505293b57a4f1 100644 (file)
--- a/lib/Target/SparcV8/SparcV8.td
+++ b/lib/Target/SparcV8/SparcV8.td
@@ -10,26 +10,41 @@
 //
 //===----------------------------------------------------------------------===//
 
-// Get the target-independent interfaces which we are implementing...
-//
-include "../Target.td"
+//===----------------------------------------------------------------------===//
+// Target-independent interfaces which we are implementing
+//===----------------------------------------------------------------------===//
+
+include "../../Target.td"
 
 //===----------------------------------------------------------------------===//
 // Register File Description
 //===----------------------------------------------------------------------===//
 
 include "SparcV8RegisterInfo.td"
+
+//===----------------------------------------------------------------------===//
+// Instruction Descriptions
+//===----------------------------------------------------------------------===//
+
 include "SparcV8InstrInfo.td"
 
 def SparcV8InstrInfo : InstrInfo {
-  let PHIInst  = PHI;
+  let PHIInst = PHI;
+
+  // Define how we want to layout our target-specific information field.
+  let TSFlagsFields = [];
+  let TSFlagsShifts = [];
 }
 
+//===----------------------------------------------------------------------===//
+// Declare the target which we are implementing
+//===----------------------------------------------------------------------===//
+
 def SparcV8 : Target {
   // Pointers are 32-bits in size.
   let PointerType = i32;
 
-  // These regs are nonvolatile across calls:
+  // FIXME: Specify callee-saved registers
   let CalleeSavedRegisters = [];
 
   // Pull in Instruction Info: