powerpc: Emulate sync instruction variants
authorJames Yang <James.Yang@freescale.com>
Wed, 3 Jul 2013 21:26:47 +0000 (16:26 -0500)
committerScott Wood <scottwood@freescale.com>
Wed, 16 Oct 2013 23:51:18 +0000 (18:51 -0500)
Reserved fields of the sync instruction have been used for other
instructions (e.g. lwsync).  On processors that do not support variants
of the sync instruction, emulate it by executing a sync to subsume the
effect of the intended instruction.

Signed-off-by: James Yang <James.Yang@freescale.com>
[scottwood@freescale.com: whitespace and subject line fix]
Signed-off-by: Scott Wood <scottwood@freescale.com>
arch/powerpc/include/asm/ppc-opcode.h
arch/powerpc/kernel/traps.c

index ad5fcf51b25225c7827f45347ce94d8f7c2584b6..442edee4b6aa5cba5306fddf2c84e82c890844d9 100644 (file)
 #define PPC_INST_LSWX                  0x7c00042a
 #define PPC_INST_LWARX                 0x7c000028
 #define PPC_INST_LWSYNC                        0x7c2004ac
+#define PPC_INST_SYNC                  0x7c0004ac
+#define PPC_INST_SYNC_MASK             0xfc0007fe
 #define PPC_INST_LXVD2X                        0x7c000698
 #define PPC_INST_MCRXR                 0x7c000400
 #define PPC_INST_MCRXR_MASK            0xfc0007fe
index f0a6814007a521649be57a7b08de14f19493ceb0..36a1f95a2a363aa3622421fb4655a33cc135e794 100644 (file)
@@ -1018,6 +1018,13 @@ static int emulate_instruction(struct pt_regs *regs)
                return emulate_isel(regs, instword);
        }
 
+       /* Emulate sync instruction variants */
+       if ((instword & PPC_INST_SYNC_MASK) == PPC_INST_SYNC) {
+               PPC_WARN_EMULATED(sync, regs);
+               asm volatile("sync");
+               return 0;
+       }
+
 #ifdef CONFIG_PPC64
        /* Emulate the mfspr rD, DSCR. */
        if ((((instword & PPC_INST_MFSPR_DSCR_USER_MASK) ==