virtual const TargetSubtargetInfo *getSubtargetImpl() const {
return nullptr;
}
- virtual TargetSubtargetInfo *getSubtargetImpl() {
+ TargetSubtargetInfo *getSubtargetImpl() {
const TargetMachine *TM = this;
return const_cast<TargetSubtargetInfo *>(TM->getSubtargetImpl());
}
bool isLittle);
const ARMSubtarget *getSubtargetImpl() const override { return &Subtarget; }
- ARMSubtarget *getSubtargetImpl() override { return &Subtarget; }
/// \brief Register ARM analysis passes with a pass manager.
void addAnalysisPasses(PassManagerBase &PM) override;
return Subtarget;
return &DefaultSubtarget;
}
- MipsSubtarget *getSubtargetImpl() override {
- if (Subtarget)
- return Subtarget;
- return &DefaultSubtarget;
+ MipsSubtarget *getSubtargetImpl() {
+ return static_cast<MipsSubtarget *>(TargetMachine::getSubtargetImpl());
}
/// \brief Reset the subtarget for the Mips target.
CodeGenOpt::Level OL, bool is64Bit);
const PPCSubtarget *getSubtargetImpl() const override { return &Subtarget; }
- PPCSubtarget *getSubtargetImpl() override { return &Subtarget; }
// Pass Pipeline Configuration
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
CodeGenOpt::Level OL, bool is64bit);
const SparcSubtarget *getSubtargetImpl() const override { return &Subtarget; }
- SparcSubtarget *getSubtargetImpl() override { return &Subtarget; }
+
+ SparcSubtarget *getSubtargetImpl() {
+ return static_cast<SparcSubtarget *>(TargetMachine::getSubtargetImpl());
+ }
// Pass Pipeline Configuration
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL);
const X86Subtarget *getSubtargetImpl() const override { return &Subtarget; }
- X86Subtarget *getSubtargetImpl() override { return &Subtarget; }
+
+ X86Subtarget *getSubtargetImpl() {
+ return static_cast<X86Subtarget *>(TargetMachine::getSubtargetImpl());
+ }
/// \brief Register X86 analysis passes with a pass manager.
void addAnalysisPasses(PassManagerBase &PM) override;