add assert zext/sext to the dag isel

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23171 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 9eef4fbc4591be9d9cefd186b9411b19d0dc4adb..915b9d0a61b4d19c4286d6c9000afee64e4757ea 100644 (file)
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -642,6 +642,9 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
     abort();
   case ISD::EntryToken:       // These leaves remain the same.
     return Op;
+  case ISD::AssertSext:
+  case ISD::AssertZext:
+    return Select(N->getOperand(0));
   case ISD::TokenFactor: {
     SDOperand New;
     if (N->getNumOperands() == 2) {