Fix predicate and add a comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111981 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp
index 51dbfc2f121869e9cbd654ba705f5f62796d6a93..4336735a29d8aa03578051f4735e4accfbfa3c71 100644 (file)
--- a/lib/Target/ARM/ARMFastISel.cpp
+++ b/lib/Target/ARM/ARMFastISel.cpp
@@ -418,7 +418,8 @@ bool ARMFastISel::ARMSelectLoad(const Instruction *I) {
   // offset instead of 0 and do all sorts of operand munging.
   unsigned ResultReg = createResultReg(FixedRC);
   // TODO: Fix the Addressing modes so that these can share some code.
-  if (AFI->isThumb2Function())
+  // Since this is a Thumb1 load this will work in Thumb1 or 2 mode.
+  if (AFI->isThumbFunction())
     AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
                             TII.get(ARM::tLDR), ResultReg)
                     .addReg(Reg).addImm(0).addReg(0));