irqchip/renesas-irqc: Move over to nested generic chip

Convert the IRQC driver to rely on GENERIC_IRQ_CHIP and
set IRQ_GC_INIT_NESTED_LOCK to enable nested locking.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Cc: jason@lakedaemon.net
Cc: geert+renesas@glider.be
Cc: horms@verge.net.au
Cc: Magnus Damm <magnus.damm@gmail.com>
Link: http://lkml.kernel.org/r/20150928094237.32552.83434.sendpatchset@little-apple
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 27b52c8729cd1e1a6f17e9945a14e894a78ee81f..67d802706be9565cd62afddb73a5e3235969c6c7 100644 (file)
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -123,6 +123,7 @@ config RENESAS_INTC_IRQPIN
 
 config RENESAS_IRQC
        bool
+       select GENERIC_IRQ_CHIP
        select IRQ_DOMAIN
 
 config ST_IRQCHIP

diff --git a/drivers/irqchip/irq-renesas-irqc.c b/drivers/irqchip/irq-renesas-irqc.c
index 35bf97ba4a3d196db74ff5835dc9c59fb056c2af..52304b139aa46a60966d03922197b060f4693cf1 100644 (file)
--- a/drivers/irqchip/irq-renesas-irqc.c
+++ b/drivers/irqchip/irq-renesas-irqc.c
@@ -62,33 +62,20 @@ struct irqc_priv {
        struct irqc_irq irq[IRQC_IRQ_MAX];
        unsigned int number_of_irqs;
        struct platform_device *pdev;
-       struct irq_chip irq_chip;
+       struct irq_chip_generic *gc;
        struct irq_domain *irq_domain;
        struct clk *clk;
 };
 
-static void irqc_dbg(struct irqc_irq *i, char *str)
-{
-       dev_dbg(&i->p->pdev->dev, "%s (%d:%d)\n",
-               str, i->requested_irq, i->hw_irq);
-}
-
-static void irqc_irq_enable(struct irq_data *d)
+static struct irqc_priv *irq_data_to_priv(struct irq_data *data)
 {
-       struct irqc_priv *p = irq_data_get_irq_chip_data(d);
-       int hw_irq = irqd_to_hwirq(d);
-
-       irqc_dbg(&p->irq[hw_irq], "enable");
-       iowrite32(BIT(hw_irq), p->cpu_int_base + IRQC_EN_SET);
+       return data->domain->host_data;
 }
 
-static void irqc_irq_disable(struct irq_data *d)
+static void irqc_dbg(struct irqc_irq *i, char *str)
 {
-       struct irqc_priv *p = irq_data_get_irq_chip_data(d);
-       int hw_irq = irqd_to_hwirq(d);
-
-       irqc_dbg(&p->irq[hw_irq], "disable");
-       iowrite32(BIT(hw_irq), p->cpu_int_base + IRQC_EN_STS);
+       dev_dbg(&i->p->pdev->dev, "%s (%d:%d)\n",
+               str, i->requested_irq, i->hw_irq);
 }
 
 static unsigned char irqc_sense[IRQ_TYPE_SENSE_MASK + 1] = {
@@ -101,7 +88,7 @@ static unsigned char irqc_sense[IRQ_TYPE_SENSE_MASK + 1] = {
 
 static int irqc_irq_set_type(struct irq_data *d, unsigned int type)
 {
-       struct irqc_priv *p = irq_data_get_irq_chip_data(d);
+       struct irqc_priv *p = irq_data_to_priv(d);
        int hw_irq = irqd_to_hwirq(d);
        unsigned char value = irqc_sense[type & IRQ_TYPE_SENSE_MASK];
        u32 tmp;
@@ -120,7 +107,7 @@ static int irqc_irq_set_type(struct irq_data *d, unsigned int type)
 
 static int irqc_irq_set_wake(struct irq_data *d, unsigned int on)
 {
-       struct irqc_priv *p = irq_data_get_irq_chip_data(d);
+       struct irqc_priv *p = irq_data_to_priv(d);
        int hw_irq = irqd_to_hwirq(d);
 
        irq_set_irq_wake(p->irq[hw_irq].requested_irq, on);
@@ -153,35 +140,11 @@ static irqreturn_t irqc_irq_handler(int irq, void *dev_id)
        return IRQ_NONE;
 }
 
-/*
- * This lock class tells lockdep that IRQC irqs are in a different
- * category than their parents, so it won't report false recursion.
- */
-static struct lock_class_key irqc_irq_lock_class;
-
-static int irqc_irq_domain_map(struct irq_domain *h, unsigned int virq,
-                              irq_hw_number_t hw)
-{
-       struct irqc_priv *p = h->host_data;
-
-       irqc_dbg(&p->irq[hw], "map");
-       irq_set_chip_data(virq, h->host_data);
-       irq_set_lockdep_class(virq, &irqc_irq_lock_class);
-       irq_set_chip_and_handler(virq, &p->irq_chip, handle_level_irq);
-       return 0;
-}
-
-static const struct irq_domain_ops irqc_irq_domain_ops = {
-       .map    = irqc_irq_domain_map,
-       .xlate  = irq_domain_xlate_twocell,
-};
-
 static int irqc_probe(struct platform_device *pdev)
 {
        struct irqc_priv *p;
        struct resource *io;
        struct resource *irq;
-       struct irq_chip *irq_chip;
        const char *name = dev_name(&pdev->dev);
        int ret;
        int k;
@@ -241,40 +204,51 @@ static int irqc_probe(struct platform_device *pdev)
 
        p->cpu_int_base = p->iomem + IRQC_INT_CPU_BASE(0); /* SYS-SPI */
 
-       irq_chip = &p->irq_chip;
-       irq_chip->name = name;
-       irq_chip->irq_mask = irqc_irq_disable;
-       irq_chip->irq_unmask = irqc_irq_enable;
-       irq_chip->irq_set_type = irqc_irq_set_type;
-       irq_chip->irq_set_wake = irqc_irq_set_wake;
-       irq_chip->flags = IRQCHIP_MASK_ON_SUSPEND;
-
        p->irq_domain = irq_domain_add_linear(pdev->dev.of_node,
                                              p->number_of_irqs,
-                                             &irqc_irq_domain_ops, p);
+                                             &irq_generic_chip_ops, p);
        if (!p->irq_domain) {
                ret = -ENXIO;
                dev_err(&pdev->dev, "cannot initialize irq domain\n");
                goto err2;
        }
 
+       ret = irq_alloc_domain_generic_chips(p->irq_domain, p->number_of_irqs,
+                                            1, name, handle_level_irq,
+                                            0, 0, IRQ_GC_INIT_NESTED_LOCK);
+       if (ret) {
+               dev_err(&pdev->dev, "cannot allocate generic chip\n");
+               goto err3;
+       }
+
+       p->gc = irq_get_domain_generic_chip(p->irq_domain, 0);
+       p->gc->reg_base = p->cpu_int_base;
+       p->gc->chip_types[0].regs.enable = IRQC_EN_SET;
+       p->gc->chip_types[0].regs.disable = IRQC_EN_STS;
+       p->gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg;
+       p->gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg;
+       p->gc->chip_types[0].chip.irq_set_type  = irqc_irq_set_type;
+       p->gc->chip_types[0].chip.irq_set_wake  = irqc_irq_set_wake;
+       p->gc->chip_types[0].chip.flags = IRQCHIP_MASK_ON_SUSPEND;
+
        /* request interrupts one by one */
        for (k = 0; k < p->number_of_irqs; k++) {
                if (request_irq(p->irq[k].requested_irq, irqc_irq_handler,
                                0, name, &p->irq[k])) {
                        dev_err(&pdev->dev, "failed to request IRQ\n");
                        ret = -ENOENT;
-                       goto err3;
+                       goto err4;
                }
        }
 
        dev_info(&pdev->dev, "driving %d irqs\n", p->number_of_irqs);
 
        return 0;
-err3:
+err4:
        while (--k >= 0)
                free_irq(p->irq[k].requested_irq, &p->irq[k]);
 
+err3:
        irq_domain_remove(p->irq_domain);
 err2:
        iounmap(p->iomem);