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diff --git a/arch/arm/mach-rk29/pm.c b/arch/arm/mach-rk29/pm.c
index 62a5bb938e84f7a630ee5d7caab7e336f3144e2c..a108345feb73eb159d799a2bf2460a5abe13b74e 100755 (executable)
--- a/arch/arm/mach-rk29/pm.c
+++ b/arch/arm/mach-rk29/pm.c
@@ -27,6 +27,11 @@
 #include <mach/ddr.h>
 #include <mach/memtester.h>
 
+#include <mach/iomux.h>
+
+#define grf_readl(offset) readl(RK29_GRF_BASE + offset)
+#define grf_writel(v, offset) do { writel(v, RK29_GRF_BASE + offset); readl(RK29_GRF_BASE + offset); } while (0)
+
 static unsigned long save_sp;
 
 static inline void delay_500ns(void)
@@ -350,6 +355,7 @@ static int rk29_pm_enter(suspend_state_t state)
 {
        u32 apll, cpll, gpll, mode, clksel0;
        u32 clkgate[4];
+       u32 gpio0_pull,gpio1_pull,gpio2_pull,gpio3_pull,gpio4_pull,gpio5_pull,gpio6_pull;
 
        // memory teseter
        if (ddr_debug == 3)
@@ -428,9 +434,39 @@ static int rk29_pm_enter(suspend_state_t state)
        cru_writel(clksel0 & ~0x7FC000, CRU_CLKSEL0_CON);
 
        printch('4');
+       /*pullup/pulldown*/
+
+       gpio0_pull = grf_readl(GRF_GPIO0_PULL);
+       gpio1_pull = grf_readl(GRF_GPIO1_PULL);
+       gpio2_pull = grf_readl(GRF_GPIO2_PULL);
+       gpio3_pull = grf_readl(GRF_GPIO3_PULL);
+       gpio4_pull = grf_readl(GRF_GPIO4_PULL);
+       gpio5_pull = grf_readl(GRF_GPIO5_PULL);
+       gpio6_pull = grf_readl(GRF_GPIO6_PULL);
+
+
+
+       grf_writel(0xffffffff,GRF_GPIO0_PULL);
+       grf_writel(0xffffffff,GRF_GPIO1_PULL);
+       grf_writel(0xffffffff,GRF_GPIO2_PULL);
+       grf_writel(0xffffffff,GRF_GPIO3_PULL);
+       grf_writel(0xffffffff,GRF_GPIO4_PULL);
+       grf_writel(0xffffffff,GRF_GPIO5_PULL);
+       grf_writel(gpio6_pull|0x0fffffff,GRF_GPIO6_PULL);
+
+       
        rk29_suspend();
        printch('4');
-
+       /*resusme pullup/pulldown*/
+       grf_writel(gpio0_pull,GRF_GPIO0_PULL);
+       grf_writel(gpio1_pull,GRF_GPIO1_PULL);
+       grf_writel(gpio2_pull,GRF_GPIO2_PULL);
+       grf_writel(gpio3_pull,GRF_GPIO3_PULL);
+       grf_writel(gpio4_pull,GRF_GPIO4_PULL);
+       grf_writel(gpio5_pull,GRF_GPIO5_PULL);
+       grf_writel(gpio6_pull,GRF_GPIO6_PULL);
+
+       
        /* resume general pll */
        cru_writel(gpll, CRU_GPLL_CON);
        delay_300us();