Add a testcase to make sure that we don't emit two fneg instructions back

to back for certain fsel instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21176 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/PowerPC/fnegsel.ll b/test/CodeGen/PowerPC/fnegsel.ll
new file mode 100644 (file)
index 0000000..9a27e81
--- /dev/null
+++ b/test/CodeGen/PowerPC/fnegsel.ll
@@ -0,0 +1,8 @@
+; RUN: llvm-as < %s | llc -march=ppc32 -enable-ppc-pattern-isel | not grep fneg
+
+double %test_fneg_sel(double %A, double %B, double %C) {
+    %D = sub double -0.0, %A
+    %Cond = setgt double %D, -0.0
+    %E = select bool %Cond, double %B, double %C
+       ret double %E
+}