Define the 2-address flag used by X86 instructions (add,sub,and,or,xor) that

need to be declared as such.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4975 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/MachineInstrInfo.h b/include/llvm/Target/MachineInstrInfo.h
index a453b4007cd5c0c265125231ba61c2847e52502d..f4a6a7714cc31076e308063dabf700ac2a492431 100644 (file)
--- a/include/llvm/Target/MachineInstrInfo.h
+++ b/include/llvm/Target/MachineInstrInfo.h
@@ -54,7 +54,8 @@ const unsigned        M_PREFETCH_FLAG         = 1 << 11;
 const unsigned M_STORE_FLAG            = 1 << 12;
 const unsigned M_DUMMY_PHI_FLAG        = 1 << 13;
 const unsigned  M_PSEUDO_FLAG           = 1 << 14;
-
+// 3-addr instructions which really work like 2-addr ones, eg. X86 add/sub
+const unsigned  M_2_ADDR_FLAG           = 1 << 15;
 
 struct MachineInstrDescriptor {
   const char *    Name;          // Assembly language mnemonic for the opcode.
@@ -186,6 +187,9 @@ public:
   bool isPseudoInstr(const MachineOpCode opCode) const {
     return get(opCode).Flags & M_PSEUDO_FLAG;
   }
+  bool isTwoAddrInstr(const MachineOpCode opCode) const {
+    return get(opCode).Flags & M_2_ADDR_FLAG;
+  }
 
   // Check if an instruction can be issued before its operands are ready,
   // or if a subsequent instruction that uses its result can be issued

diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index a453b4007cd5c0c265125231ba61c2847e52502d..f4a6a7714cc31076e308063dabf700ac2a492431 100644 (file)
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -54,7 +54,8 @@ const unsigned        M_PREFETCH_FLAG         = 1 << 11;
 const unsigned M_STORE_FLAG            = 1 << 12;
 const unsigned M_DUMMY_PHI_FLAG        = 1 << 13;
 const unsigned  M_PSEUDO_FLAG           = 1 << 14;
-
+// 3-addr instructions which really work like 2-addr ones, eg. X86 add/sub
+const unsigned  M_2_ADDR_FLAG           = 1 << 15;
 
 struct MachineInstrDescriptor {
   const char *    Name;          // Assembly language mnemonic for the opcode.
@@ -186,6 +187,9 @@ public:
   bool isPseudoInstr(const MachineOpCode opCode) const {
     return get(opCode).Flags & M_PSEUDO_FLAG;
   }
+  bool isTwoAddrInstr(const MachineOpCode opCode) const {
+    return get(opCode).Flags & M_2_ADDR_FLAG;
+  }
 
   // Check if an instruction can be issued before its operands are ready,
   // or if a subsequent instruction that uses its result can be issued