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Simplify condition checking as CONCAT assume all inputs of the same type.
author
Michael Liao
<michael.liao@intel.com>
Fri, 19 Oct 2012 03:17:00 +0000
(
03:17
+0000)
committer
Michael Liao
<michael.liao@intel.com>
Fri, 19 Oct 2012 03:17:00 +0000
(
03:17
+0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166260
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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diff --git
a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 22270968e3fb954b1f25fd5022da61b97c4c25cd..17386b74e36bd738c8f88314dfda5d4a98a76580 100644
(file)
--- a/
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@
-8629,9
+8629,9
@@
SDValue DAGCombiner::visitEXTRACT_SUBVECTOR(SDNode* N) {
// (extract_subvec (concat V1, V2, ...), i)
// Into:
// Vi if possible
- for (unsigned i = 0, e = V->getNumOperands(); i != e; ++i)
-
if (V->getOperand(i
).getValueType() != NVT)
-
return SDValue();
+ // Only operand 0 is checked as 'concat' assumes all inputs of the same type.
+
if (V->getOperand(0
).getValueType() != NVT)
+ return SDValue();
unsigned Idx = dyn_cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
unsigned NumElems = NVT.getVectorNumElements();
assert((Idx % NumElems) == 0 &&