Properly deal with empty intervals when checking for interference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121319 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/LiveIntervalUnion.cpp b/lib/CodeGen/LiveIntervalUnion.cpp
index bedf22b5bad84dfd31ffc6c9dfdeeb63cdf1b45b..4b9a2d302c09cd2e7de8cdef47e13bc8b2a95578 100644 (file)
--- a/lib/CodeGen/LiveIntervalUnion.cpp
+++ b/lib/CodeGen/LiveIntervalUnion.cpp
@@ -111,9 +111,10 @@ void LiveIntervalUnion::verify(LiveVirtRegBitSet& VisitedVRegs) {
 // Assumes that segments are sorted by start position in both
 // LiveInterval and LiveSegments.
 void LiveIntervalUnion::Query::findIntersection(InterferenceResult &IR) const {
-
   // Search until reaching the end of the LiveUnion segments.
   LiveInterval::iterator VirtRegEnd = VirtReg->end();
+  if (IR.VirtRegI == VirtRegEnd)
+    return;
   while (IR.LiveUnionI.valid()) {
     // Slowly advance the live virtual reg iterator until we surpass the next
     // segment in LiveUnion.

diff --git a/lib/CodeGen/RegAllocGreedy.cpp b/lib/CodeGen/RegAllocGreedy.cpp
index c88d474315e766b6bcd46d914c8aa61e80870478..f69979bf2aaad20881cbed413db73635376c8228 100644 (file)
--- a/lib/CodeGen/RegAllocGreedy.cpp
+++ b/lib/CodeGen/RegAllocGreedy.cpp
@@ -173,6 +173,7 @@ unsigned RAGreedy::selectOrSplit(LiveInterval &VirtReg,
       // Found an available register.
       return PhysReg;
     }
+    assert(!VirtReg.empty() && "Empty VirtReg has interference");
     LiveInterval *interferingVirtReg =
       Queries[interfReg].firstInterference().liveUnionPos().value();