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phy: rockchip-inno-usb2: add phy1 otg-port configurations for rk3399
author
Wu Liang feng
<wulf@rock-chips.com>
Wed, 27 Jul 2016 14:04:33 +0000
(22:04 +0800)
committer
Huang, Tao
<huangtao@rock-chips.com>
Fri, 29 Jul 2016 02:39:21 +0000
(10:39 +0800)
This patch add USB2 PHY1 OTG port configurations for rk3399,
it support PHY1 suspend and bvalid detect, but not support
usb battery charger detect.
Change-Id: I7a6aaf484d6ad2ad097a7d9679a56aa545f217c8
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
drivers/phy/phy-rockchip-inno-usb2.c
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diff --git
a/drivers/phy/phy-rockchip-inno-usb2.c
b/drivers/phy/phy-rockchip-inno-usb2.c
index e3336eb59593ebfde564fe3e606ce88e6e8593e2..b8c4c80161c2a9fe9154e65831ac8bcf12c10ed6 100644
(file)
--- a/
drivers/phy/phy-rockchip-inno-usb2.c
+++ b/
drivers/phy/phy-rockchip-inno-usb2.c
@@
-1233,6
+1233,14
@@
static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = {
.num_ports = 2,
.clkout_ctl = { 0xe460, 4, 4, 1, 0 },
.port_cfgs = {
+ [USB2PHY_PORT_OTG] = {
+ .phy_sus = { 0xe464, 1, 0, 2, 1 },
+ .bvalid_det_en = { 0xe3c0, 8, 8, 0, 1 },
+ .bvalid_det_st = { 0xe3e0, 8, 8, 0, 1 },
+ .bvalid_det_clr = { 0xe3d0, 8, 8, 0, 1 },
+ .utmi_avalid = { 0xe2ac, 10, 10, 0, 1 },
+ .utmi_bvalid = { 0xe2ac, 16, 16, 0, 1 },
+ },
[USB2PHY_PORT_HOST] = {
.phy_sus = { 0xe468, 1, 0, 0x2, 0x1 },
.ls_det_en = { 0xe3c0, 11, 11, 0, 1 },