///
inline MachineInstrBuilder BuildMI(MachineFunction &MF,
const TargetInstrDesc &TID) {
- return MachineInstrBuilder(MF.CreateMachineInstr(TID));
+ return MachineInstrBuilder(MF.CreateMachineInstr(TID,
+ DebugLoc::getUnknownLoc()));
+}
+inline MachineInstrBuilder BuildMI(MachineFunction &MF,
+ DebugLoc DL,
+ const TargetInstrDesc &TID) {
+ return MachineInstrBuilder(MF.CreateMachineInstr(TID, DL));
}
/// BuildMI - This version of the builder sets up the first operand as a
/// destination virtual register.
///
-inline MachineInstrBuilder BuildMI(MachineFunction &MF,
- const TargetInstrDesc &TID,
- unsigned DestReg) {
- return MachineInstrBuilder(MF.CreateMachineInstr(TID)).addReg(DestReg, true);
+inline MachineInstrBuilder BuildMI(MachineFunction &MF,
+ const TargetInstrDesc &TID,
+ unsigned DestReg) {
+ return MachineInstrBuilder(MF.CreateMachineInstr(TID,
+ DebugLoc::getUnknownLoc()))
+ .addReg(DestReg, true);
+}
+inline MachineInstrBuilder BuildMI(MachineFunction &MF,
+ DebugLoc DL,
+ const TargetInstrDesc &TID,
+ unsigned DestReg) {
+ return MachineInstrBuilder(MF.CreateMachineInstr(TID, DL))
+ .addReg(DestReg, true);
}
/// BuildMI - This version of the builder inserts the newly-built
MachineBasicBlock::iterator I,
const TargetInstrDesc &TID,
unsigned DestReg) {
- MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID);
+ MachineInstr *MI =
+ BB.getParent()->CreateMachineInstr(TID, DebugLoc::getUnknownLoc());
+ BB.insert(I, MI);
+ return MachineInstrBuilder(MI).addReg(DestReg, true);
+}
+inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
+ MachineBasicBlock::iterator I,
+ DebugLoc DL,
+ const TargetInstrDesc &TID,
+ unsigned DestReg) {
+ MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID, DL);
BB.insert(I, MI);
return MachineInstrBuilder(MI).addReg(DestReg, true);
}
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I,
const TargetInstrDesc &TID) {
- MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID);
+ MachineInstr *MI =
+ BB.getParent()->CreateMachineInstr(TID, DebugLoc::getUnknownLoc());
+ BB.insert(I, MI);
+ return MachineInstrBuilder(MI);
+}
+inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
+ MachineBasicBlock::iterator I,
+ DebugLoc DL,
+ const TargetInstrDesc &TID) {
+ MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID, DL);
BB.insert(I, MI);
return MachineInstrBuilder(MI);
}
const TargetInstrDesc &TID) {
return BuildMI(*BB, BB->end(), TID);
}
+inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
+ DebugLoc DL,
+ const TargetInstrDesc &TID) {
+ return BuildMI(*BB, BB->end(), DL, TID);
+}
/// BuildMI - This version of the builder inserts the newly-built
/// instruction at the end of the given MachineBasicBlock, and sets up the first
unsigned DestReg) {
return BuildMI(*BB, BB->end(), TID, DestReg);
}
+inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
+ DebugLoc DL,
+ const TargetInstrDesc &TID,
+ unsigned DestReg) {
+ return BuildMI(*BB, BB->end(), DL, TID, DestReg);
+}
} // End llvm namespace
Reg = LocalValueMap[CE];
} else if (isa<UndefValue>(V)) {
Reg = createResultReg(TLI.getRegClassFor(VT));
- BuildMI(MBB, TII.get(TargetInstrInfo::IMPLICIT_DEF), Reg);
+ BuildMI(MBB, DL, TII.get(TargetInstrInfo::IMPLICIT_DEF), Reg);
}
// If target-independent code couldn't handle the value, give target-specific
unsigned Line = SPI->getLine();
unsigned Col = SPI->getColumn();
unsigned ID = DW->RecordSourceLine(Line, Col, SrcFile);
+ unsigned Idx = MF.getOrCreateDebugLocID(SrcFile, Line, Col);
+ setCurDebugLoc(DebugLoc::get(Idx));
const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
- BuildMI(MBB, II).addImm(ID);
+ BuildMI(MBB, DL, II).addImm(ID);
}
return true;
}
unsigned ID =
DW->RecordRegionStart(cast<GlobalVariable>(RSI->getContext()));
const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
- BuildMI(MBB, II).addImm(ID);
+ BuildMI(MBB, DL, II).addImm(ID);
}
return true;
}
unsigned ID =
DW->RecordRegionEnd(cast<GlobalVariable>(REI->getContext()));
const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
- BuildMI(MBB, II).addImm(ID);
+ BuildMI(MBB, DL, II).addImm(ID);
}
return true;
}
if (!DW) return true;
DbgFuncStartInst *FSI = cast<DbgFuncStartInst>(I);
Value *SP = FSI->getSubprogram();
+
if (DW->ValidDebugInfo(SP)) {
- // llvm.dbg.func.start implicitly defines a dbg_stoppoint which is
- // what (most?) gdb expects.
+ // llvm.dbg.func.start implicitly defines a dbg_stoppoint which is what
+ // (most?) gdb expects.
DISubprogram Subprogram(cast<GlobalVariable>(SP));
DICompileUnit CompileUnit = Subprogram.getCompileUnit();
unsigned SrcFile = DW->RecordSource(CompileUnit.getDirectory(),
CompileUnit.getFilename());
+
// Record the source line but does not create a label for the normal
// function start. It will be emitted at asm emission time. However,
// create a label if this is a beginning of inlined function.
- unsigned LabelID =
- DW->RecordSourceLine(Subprogram.getLineNumber(), 0, SrcFile);
+ unsigned Line = Subprogram.getLineNumber();
+ unsigned LabelID = DW->RecordSourceLine(Line, 0, SrcFile);
+ setCurDebugLoc(DebugLoc::get(MF.getOrCreateDebugLocID(SrcFile, Line, 0)));
+
if (DW->getRecordSourceLineCount() != 1) {
const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
- BuildMI(MBB, II).addImm(LabelID);
+ BuildMI(MBB, DL, II).addImm(LabelID);
}
}
+
return true;
}
case Intrinsic::dbg_declare: {
// Build the DECLARE instruction.
const TargetInstrDesc &II = TII.get(TargetInstrInfo::DECLARE);
- BuildMI(MBB, II).addFrameIndex(FI).addGlobalAddress(GV);
+ BuildMI(MBB, DL, II).addFrameIndex(FI).addGlobalAddress(GV);
}
return true;
}
unsigned ResultReg = createResultReg(RC);
const TargetInstrDesc &II = TII.get(MachineInstOpcode);
- BuildMI(MBB, II, ResultReg);
+ BuildMI(MBB, DL, II, ResultReg);
return ResultReg;
}
const TargetInstrDesc &II = TII.get(MachineInstOpcode);
if (II.getNumDefs() >= 1)
- BuildMI(MBB, II, ResultReg).addReg(Op0);
+ BuildMI(MBB, DL, II, ResultReg).addReg(Op0);
else {
- BuildMI(MBB, II).addReg(Op0);
+ BuildMI(MBB, DL, II).addReg(Op0);
bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
II.ImplicitDefs[0], RC, RC);
if (!InsertedCopy)
const TargetInstrDesc &II = TII.get(MachineInstOpcode);
if (II.getNumDefs() >= 1)
- BuildMI(MBB, II, ResultReg).addReg(Op0).addReg(Op1);
+ BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addReg(Op1);
else {
- BuildMI(MBB, II).addReg(Op0).addReg(Op1);
+ BuildMI(MBB, DL, II).addReg(Op0).addReg(Op1);
bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
II.ImplicitDefs[0], RC, RC);
if (!InsertedCopy)
const TargetInstrDesc &II = TII.get(MachineInstOpcode);
if (II.getNumDefs() >= 1)
- BuildMI(MBB, II, ResultReg).addReg(Op0).addImm(Imm);
+ BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addImm(Imm);
else {
- BuildMI(MBB, II).addReg(Op0).addImm(Imm);
+ BuildMI(MBB, DL, II).addReg(Op0).addImm(Imm);
bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
II.ImplicitDefs[0], RC, RC);
if (!InsertedCopy)
const TargetInstrDesc &II = TII.get(MachineInstOpcode);
if (II.getNumDefs() >= 1)
- BuildMI(MBB, II, ResultReg).addReg(Op0).addFPImm(FPImm);
+ BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addFPImm(FPImm);
else {
- BuildMI(MBB, II).addReg(Op0).addFPImm(FPImm);
+ BuildMI(MBB, DL, II).addReg(Op0).addFPImm(FPImm);
bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
II.ImplicitDefs[0], RC, RC);
if (!InsertedCopy)
const TargetInstrDesc &II = TII.get(MachineInstOpcode);
if (II.getNumDefs() >= 1)
- BuildMI(MBB, II, ResultReg).addReg(Op0).addReg(Op1).addImm(Imm);
+ BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addReg(Op1).addImm(Imm);
else {
- BuildMI(MBB, II).addReg(Op0).addReg(Op1).addImm(Imm);
+ BuildMI(MBB, DL, II).addReg(Op0).addReg(Op1).addImm(Imm);
bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
II.ImplicitDefs[0], RC, RC);
if (!InsertedCopy)
const TargetInstrDesc &II = TII.get(MachineInstOpcode);
if (II.getNumDefs() >= 1)
- BuildMI(MBB, II, ResultReg).addImm(Imm);
+ BuildMI(MBB, DL, II, ResultReg).addImm(Imm);
else {
- BuildMI(MBB, II).addImm(Imm);
+ BuildMI(MBB, DL, II).addImm(Imm);
bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
II.ImplicitDefs[0], RC, RC);
if (!InsertedCopy)
const TargetInstrDesc &II = TII.get(TargetInstrInfo::EXTRACT_SUBREG);
if (II.getNumDefs() >= 1)
- BuildMI(MBB, II, ResultReg).addReg(Op0).addImm(Idx);
+ BuildMI(MBB, DL, II, ResultReg).addReg(Op0).addImm(Idx);
else {
- BuildMI(MBB, II).addReg(Op0).addImm(Idx);
+ BuildMI(MBB, DL, II).addReg(Op0).addImm(Idx);
bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
II.ImplicitDefs[0], RC, RC);
if (!InsertedCopy)