USB: EHCI: Add bus glue for GRLIB GRUSBHC controller
authorJan Andersson <jan@gaisler.com>
Tue, 3 May 2011 18:11:58 +0000 (20:11 +0200)
committerGreg Kroah-Hartman <gregkh@suse.de>
Tue, 3 May 2011 18:43:48 +0000 (11:43 -0700)
This patch adds support for the GRLIB GRUSBHC EHCI controller from
Aeroflex Gaisler. The controller is typically found on LEON/GRLIB
SoCs.

Tested on GR-LEON4-ITX with with little endian interface and on
LEON3 system on GR-PCI-XC5V development board for big endian
controller.

Signed-off-by: Jan Andersson <jan@gaisler.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
drivers/usb/Kconfig
drivers/usb/host/Kconfig
drivers/usb/host/ehci-grlib.c [new file with mode: 0644]
drivers/usb/host/ehci-hcd.c
drivers/usb/host/ehci.h

index a1b3750cadb3806afcfffbb139311d05d3825834..48f1781352f154e9820eda618696c9e3d486c0af 100644 (file)
@@ -68,6 +68,7 @@ config USB_ARCH_HAS_EHCI
        default y if PLAT_S5P
        default y if ARCH_MSM
        default y if MICROBLAZE
+       default y if SPARC_LEON
        default PCI
 
 # ARM SA1111 chips have a non-PCI based "OHCI-compatible" USB host interface.
index fe4beca00009c1b59f3aff3c635dc5ecff75e026..7dd4c44fabb4b6b4a7347e090b03467885d4afbd 100644 (file)
@@ -106,13 +106,13 @@ config USB_EHCI_BIG_ENDIAN_MMIO
        depends on USB_EHCI_HCD && (PPC_CELLEB || PPC_PS3 || 440EPX || \
                                    ARCH_IXP4XX || XPS_USB_HCD_XILINX || \
                                    PPC_MPC512x || CPU_CAVIUM_OCTEON || \
-                                   PMC_MSP)
+                                   PMC_MSP || SPARC_LEON)
        default y
 
 config USB_EHCI_BIG_ENDIAN_DESC
        bool
        depends on USB_EHCI_HCD && (440EPX || ARCH_IXP4XX || XPS_USB_HCD_XILINX || \
-                                   PPC_MPC512x || PMC_MSP)
+                                   PPC_MPC512x || PMC_MSP || SPARC_LEON)
        default y
 
 config XPS_USB_HCD_XILINX
diff --git a/drivers/usb/host/ehci-grlib.c b/drivers/usb/host/ehci-grlib.c
new file mode 100644 (file)
index 0000000..93b230d
--- /dev/null
@@ -0,0 +1,242 @@
+/*
+ * Driver for Aeroflex Gaisler GRLIB GRUSBHC EHCI host controller
+ *
+ * GRUSBHC is typically found on LEON/GRLIB SoCs
+ *
+ * (c) Jan Andersson <jan@gaisler.com>
+ *
+ * Based on ehci-ppc-of.c which is:
+ * (c) Valentine Barshak <vbarshak@ru.mvista.com>
+ * and in turn based on "ehci-ppc-soc.c" by Stefan Roese <sr@denx.de>
+ * and "ohci-ppc-of.c" by Sylvain Munaut <tnt@246tNt.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation,
+ * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include <linux/signal.h>
+
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+
+#define GRUSBHC_HCIVERSION 0x0100 /* Known value of cap. reg. HCIVERSION */
+
+/* called during probe() after chip reset completes */
+static int ehci_grlib_setup(struct usb_hcd *hcd)
+{
+       struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+       int             retval;
+
+       retval = ehci_halt(ehci);
+       if (retval)
+               return retval;
+
+       retval = ehci_init(hcd);
+       if (retval)
+               return retval;
+
+       ehci->sbrn = 0x20;
+       ehci_port_power(ehci, 1);
+
+       return ehci_reset(ehci);
+}
+
+
+static const struct hc_driver ehci_grlib_hc_driver = {
+       .description            = hcd_name,
+       .product_desc           = "GRLIB GRUSBHC EHCI",
+       .hcd_priv_size          = sizeof(struct ehci_hcd),
+
+       /*
+        * generic hardware linkage
+        */
+       .irq                    = ehci_irq,
+       .flags                  = HCD_MEMORY | HCD_USB2,
+
+       /*
+        * basic lifecycle operations
+        */
+       .reset                  = ehci_grlib_setup,
+       .start                  = ehci_run,
+       .stop                   = ehci_stop,
+       .shutdown               = ehci_shutdown,
+
+       /*
+        * managing i/o requests and associated device resources
+        */
+       .urb_enqueue            = ehci_urb_enqueue,
+       .urb_dequeue            = ehci_urb_dequeue,
+       .endpoint_disable       = ehci_endpoint_disable,
+       .endpoint_reset         = ehci_endpoint_reset,
+
+       /*
+        * scheduling support
+        */
+       .get_frame_number       = ehci_get_frame,
+
+       /*
+        * root hub support
+        */
+       .hub_status_data        = ehci_hub_status_data,
+       .hub_control            = ehci_hub_control,
+#ifdef CONFIG_PM
+       .bus_suspend            = ehci_bus_suspend,
+       .bus_resume             = ehci_bus_resume,
+#endif
+       .relinquish_port        = ehci_relinquish_port,
+       .port_handed_over       = ehci_port_handed_over,
+
+       .clear_tt_buffer_complete       = ehci_clear_tt_buffer_complete,
+};
+
+
+static int __devinit ehci_hcd_grlib_probe(struct platform_device *op)
+{
+       struct device_node *dn = op->dev.of_node;
+       struct usb_hcd *hcd;
+       struct ehci_hcd *ehci = NULL;
+       struct resource res;
+       u32 hc_capbase;
+       int irq;
+       int rv;
+
+       if (usb_disabled())
+               return -ENODEV;
+
+       dev_dbg(&op->dev, "initializing GRUSBHC EHCI USB Controller\n");
+
+       rv = of_address_to_resource(dn, 0, &res);
+       if (rv)
+               return rv;
+
+       /* usb_create_hcd requires dma_mask != NULL */
+       op->dev.dma_mask = &op->dev.coherent_dma_mask;
+       hcd = usb_create_hcd(&ehci_grlib_hc_driver, &op->dev,
+                       "GRUSBHC EHCI USB");
+       if (!hcd)
+               return -ENOMEM;
+
+       hcd->rsrc_start = res.start;
+       hcd->rsrc_len = res.end - res.start + 1;
+
+       if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
+               printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__);
+               rv = -EBUSY;
+               goto err_rmr;
+       }
+
+       irq = irq_of_parse_and_map(dn, 0);
+       if (irq == NO_IRQ) {
+               printk(KERN_ERR "%s: irq_of_parse_and_map failed\n", __FILE__);
+               rv = -EBUSY;
+               goto err_irq;
+       }
+
+       hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
+       if (!hcd->regs) {
+               printk(KERN_ERR "%s: ioremap failed\n", __FILE__);
+               rv = -ENOMEM;
+               goto err_ioremap;
+       }
+
+       ehci = hcd_to_ehci(hcd);
+
+       ehci->caps = hcd->regs;
+
+       /* determine endianness of this implementation */
+       hc_capbase = ehci_readl(ehci, &ehci->caps->hc_capbase);
+       if (HC_VERSION(ehci, hc_capbase) != GRUSBHC_HCIVERSION) {
+               ehci->big_endian_mmio = 1;
+               ehci->big_endian_desc = 1;
+               ehci->big_endian_capbase = 1;
+       }
+
+       ehci->regs = hcd->regs +
+               HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
+
+       /* cache this readonly data; minimize chip reads */
+       ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
+
+       rv = usb_add_hcd(hcd, irq, 0);
+       if (rv)
+               goto err_ehci;
+
+       return 0;
+
+err_ehci:
+       iounmap(hcd->regs);
+err_ioremap:
+       irq_dispose_mapping(irq);
+err_irq:
+       release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+err_rmr:
+       usb_put_hcd(hcd);
+
+       return rv;
+}
+
+
+static int ehci_hcd_grlib_remove(struct platform_device *op)
+{
+       struct usb_hcd *hcd = dev_get_drvdata(&op->dev);
+
+       dev_set_drvdata(&op->dev, NULL);
+
+       dev_dbg(&op->dev, "stopping GRLIB GRUSBHC EHCI USB Controller\n");
+
+       usb_remove_hcd(hcd);
+
+       iounmap(hcd->regs);
+       irq_dispose_mapping(hcd->irq);
+       release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+
+       usb_put_hcd(hcd);
+
+       return 0;
+}
+
+
+static void ehci_hcd_grlib_shutdown(struct platform_device *op)
+{
+       struct usb_hcd *hcd = dev_get_drvdata(&op->dev);
+
+       if (hcd->driver->shutdown)
+               hcd->driver->shutdown(hcd);
+}
+
+
+static const struct of_device_id ehci_hcd_grlib_of_match[] = {
+       {
+               .name = "GAISLER_EHCI",
+        },
+       {
+               .name = "01_026",
+        },
+       {},
+};
+MODULE_DEVICE_TABLE(of, ehci_hcd_grlib_of_match);
+
+
+static struct platform_driver ehci_grlib_driver = {
+       .probe          = ehci_hcd_grlib_probe,
+       .remove         = ehci_hcd_grlib_remove,
+       .shutdown       = ehci_hcd_grlib_shutdown,
+       .driver = {
+               .name = "grlib-ehci",
+               .owner = THIS_MODULE,
+               .of_match_table = ehci_hcd_grlib_of_match,
+       },
+};
index 8164ffafd10a65e3adf9d117d24b956fffa8800c..c5719cd258c3a12652e72381474b595825418e46 100644 (file)
@@ -1275,6 +1275,11 @@ MODULE_LICENSE ("GPL");
 #define PLATFORM_DRIVER                ehci_ath79_driver
 #endif
 
+#ifdef CONFIG_SPARC_LEON
+#include "ehci-grlib.c"
+#define PLATFORM_DRIVER                ehci_grlib_driver
+#endif
+
 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
     !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
     !defined(XILINX_OF_PLATFORM_DRIVER)
index d0792f591590ba57b8b02bac43dca3ada52ad6b7..829213423dea16b5eaa5e0d37ff8b3fd55ece3d5 100644 (file)
@@ -627,6 +627,9 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
 #if defined(CONFIG_ARM) && defined(CONFIG_ARCH_IXP4XX)
 #define readl_be(addr)         __raw_readl((__force unsigned *)addr)
 #define writel_be(val, addr)   __raw_writel(val, (__force unsigned *)addr)
+#elif defined(CONFIG_SPARC_LEON)
+#define readl_be(addr)         __raw_readl(addr)
+#define writel_be(val, addr)   __raw_writel(val, addr)
 #endif
 
 static inline unsigned int ehci_readl(const struct ehci_hcd *ehci,