ARM: dts: vf610-colibri: Add PWM support

The Colibri standard defines four pins as PWM outputs, two of them (PWM
A and C) are routed to FTM instance 0 and the other two (PWM B and D)
are routed to FTM instance 1. Hence enable both FTM instances for the
Colibri module and mux the four pins accordingly.

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

diff --git a/arch/arm/boot/dts/vf610-colibri-eval-v3.dts b/arch/arm/boot/dts/vf610-colibri-eval-v3.dts
index 7fb306679341a5d94a8c3fed2f8a3434d940709d..00f63d936aab67e13f6abaec83f5b21c9bf35a51 100644 (file)
--- a/arch/arm/boot/dts/vf610-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/vf610-colibri-eval-v3.dts
@@ -33,6 +33,14 @@
        status = "okay";
 };
 
+&pwm0 {
+       status = "okay";
+};
+
+&pwm1 {
+       status = "okay";
+};
+
 &uart0 {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/vf610-colibri.dtsi b/arch/arm/boot/dts/vf610-colibri.dtsi
index 0cd83434b073695e7ae99849443a33e6d19b55b3..1f73c1c824e587eeac4b2fceac8fea59dfe15976 100644 (file)
--- a/arch/arm/boot/dts/vf610-colibri.dtsi
+++ b/arch/arm/boot/dts/vf610-colibri.dtsi
@@ -44,6 +44,16 @@
        arm,tag-latency = <3 2 3>;
 };
 
+&pwm0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm0>;
+};
+
+&pwm1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm1>;
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart0>;
@@ -97,6 +107,20 @@
                        >;
                };
 
+               pinctrl_pwm0: pwm0grp {
+                       fsl,pins = <
+                               VF610_PAD_PTB0__FTM0_CH0                0x1182
+                               VF610_PAD_PTB1__FTM0_CH1                0x1182
+                       >;
+               };
+
+               pinctrl_pwm1: pwm1grp {
+                       fsl,pins = <
+                               VF610_PAD_PTB8__FTM1_CH0                0x1182
+                               VF610_PAD_PTB9__FTM1_CH1                0x1182
+                       >;
+               };
+
                pinctrl_uart0: uart0grp {
                        fsl,pins = <
                                VF610_PAD_PTB10__UART0_TX               0x21a2