drm/rockchip: lvds: RGB output should enable LVDS channel 1

Change-Id: Iaa7b95f1316fa77425992574288b3262d5af84e7
Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.c b/drivers/gpu/drm/rockchip/rockchip_lvds.c
index db95aeb5b20d495c0c9a121bfe85b96cda498a62..14855cc2db973f970f04c89245d0ece63be30fd4 100644 (file)
--- a/drivers/gpu/drm/rockchip/rockchip_lvds.c
+++ b/drivers/gpu/drm/rockchip/rockchip_lvds.c
@@ -86,9 +86,10 @@ struct rockchip_lvds {
 static inline void lvds_writel(struct rockchip_lvds *lvds, u32 offset, u32 val)
 {
        writel_relaxed(val, lvds->regs + offset);
-       if ((lvds->output == DISPLAY_OUTPUT_DUAL_LVDS) &&
+       if ((lvds->output != DISPLAY_OUTPUT_LVDS) &&
            (LVDS_CHIP(lvds) == RK3288_LVDS))
-               writel_relaxed(val, lvds->regs + offset + 0x100);
+               writel_relaxed(val,
+                              lvds->regs + offset + RK3288_LVDS_CH1_OFFSET);
 }
 
 static inline void lvds_msk_reg(struct rockchip_lvds *lvds, u32 offset,

diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.h b/drivers/gpu/drm/rockchip/rockchip_lvds.h
index 62772d51f0406699cae5d030c4cf06108d82dafa..7144946837a2f6971edf6f0e10bab5360829511a 100644 (file)
--- a/drivers/gpu/drm/rockchip/rockchip_lvds.h
+++ b/drivers/gpu/drm/rockchip/rockchip_lvds.h
@@ -78,6 +78,7 @@
 #define RK3288_LVDS_CFG_REG21                  0x84
 #define RK3288_LVDS_CFG_REG21_TX_ENABLE                0x92
 #define RK3288_LVDS_CFG_REG21_TX_DISABLE       0x00
+#define RK3288_LVDS_CH1_OFFSET                 0x100
 
 /* fbdiv value is split over 2 registers, with bit8 in reg2 */
 #define RK3288_LVDS_PLL_FBDIV_REG2(_fbd) \