projects
/
firefly-linux-kernel-4.4.55.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
e245e3b
)
amd64_edac: Fix logic to determine channel for F15 M30h processors
author
Aravind Gopalakrishnan
<Aravind.Gopalakrishnan@amd.com>
Tue, 21 Jan 2014 21:03:36 +0000
(15:03 -0600)
committer
Borislav Petkov
<bp@suse.de>
Fri, 7 Feb 2014 14:01:19 +0000
(15:01 +0100)
Update current channel selection logic to include F15h, M30h memory
controllers.
Refer F15 M30h BKDG D18F2x110[7:6] (DRAM Controller Select Low)
(Link:http://support.amd.com/TechDocs/49125_15h_Models_30h-3Fh_BKDG.pdf)
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Link:
http://lkml.kernel.org/r/1390338216-3873-1-git-send-email-Aravind.Gopalakrishnan@amd.com
Signed-off-by: Borislav Petkov <bp@suse.de>
drivers/edac/amd64_edac.c
patch
|
blob
|
history
diff --git
a/drivers/edac/amd64_edac.c
b/drivers/edac/amd64_edac.c
index 98e14ee4833c4d26b805843bcbe30daf29f99bb3..34380ccc3dd95538aef011e856e8e68a225ce207 100644
(file)
--- a/
drivers/edac/amd64_edac.c
+++ b/
drivers/edac/amd64_edac.c
@@
-1239,9
+1239,17
@@
static u8 f15_m30h_determine_channel(struct amd64_pvt *pvt, u64 sys_addr,
if (num_dcts_intlv == 2) {
select = (sys_addr >> 8) & 0x3;
channel = select ? 0x3 : 0;
- } else if (num_dcts_intlv == 4)
- channel = (sys_addr >> 8) & 0x7;
-
+ } else if (num_dcts_intlv == 4) {
+ u8 intlv_addr = dct_sel_interleave_addr(pvt);
+ switch (intlv_addr) {
+ case 0x4:
+ channel = (sys_addr >> 8) & 0x3;
+ break;
+ case 0x5:
+ channel = (sys_addr >> 9) & 0x3;
+ break;
+ }
+ }
return channel;
}