clkgate[1] = cru_readl(CRU_CLKGATE1_CON);
clkgate[2] = cru_readl(CRU_CLKGATE2_CON);
clkgate[3] = cru_clkgate3_con_mirror;
- cru_writel(~((1 << CLK_GATE_CORE)
+ cru_writel((~((1 << CLK_GATE_CORE)
| (1 << CLK_GATE_ACLK_CPU)
| (1 << CLK_GATE_ACLK_CPU2)
| (1 << CLK_GATE_PCLK_CPU)
| (1 << CLK_GATE_GPIO0)
| (1 << CLK_GATE_RTC)
| (1 << CLK_GATE_GRF)
- ) | clkgate[0], CRU_CLKGATE0_CON);
+ ) | clkgate[0])&(~(1 << CLK_GATE_UART0)), CRU_CLKGATE0_CON);
cru_writel(~0, CRU_CLKGATE1_CON);
cru_writel(~((1 << CLK_GATE_GPIO1 % 32)
| (1 << CLK_GATE_GPIO2 % 32)
{
power_on = 0;
modem_poweron_off(1);
+ #if 1 // phc
+ rk29_mux_api_set(GPIO1B7_UART0SOUT_NAME, GPIO1L_UART0_SOUT);
+ rk29_mux_api_set(GPIO1B6_UART0SIN_NAME, GPIO1L_UART0_SIN);
+ rk29_mux_api_set(GPIO1C1_UART0RTSN_SDMMC1WRITEPRT_NAME, GPIO1H_UART0_RTS_N);
+ rk29_mux_api_set(GPIO1C0_UART0CTSN_SDMMC1DETECTN_NAME, GPIO1H_UART0_CTS_N);
+ #endif
}
device_init_wakeup(&pdev, 1);