x86, irq, PCI: Keep IRQ assignment for runtime power management
authorJiang Liu <jiang.liu@linux.intel.com>
Fri, 29 Aug 2014 09:26:23 +0000 (17:26 +0800)
committerThomas Gleixner <tglx@linutronix.de>
Fri, 29 Aug 2014 11:38:00 +0000 (13:38 +0200)
Now IOAPIC driver dynamically allocates IRQ numbers for IOAPIC pins.
We need to keep IRQ assignment for PCI devices during runtime power
management, otherwise it may cause failure of device wakeups.

Commit 3eec595235c17a7 "x86, irq, PCI: Keep IRQ assignment for PCI
devices during suspend/hibernation" has fixed the issue for suspend/
hibernation, we also need the same fix for runtime device sleep too.

Fix: https://bugzilla.kernel.org/show_bug.cgi?id=83271
Reported-and-Tested-by: EmanueL Czirai <amanual@openmailbox.org>
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: EmanueL Czirai <amanual@openmailbox.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Grant Likely <grant.likely@linaro.org>
Link: http://lkml.kernel.org/r/1409304383-18806-1-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
arch/x86/include/asm/io_apic.h
arch/x86/kernel/apic/io_apic.c
arch/x86/pci/intel_mid_pci.c
arch/x86/pci/irq.c
drivers/acpi/pci_irq.c

index 0aeed5ca356ec04bdbc4705fb6bbf5010cb65354..478c490f36547930e7101c4ad051292810fb04db 100644 (file)
@@ -227,6 +227,8 @@ static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned
 
 extern void io_apic_eoi(unsigned int apic, unsigned int vector);
 
+extern bool mp_should_keep_irq(struct device *dev);
+
 #else  /* !CONFIG_X86_IO_APIC */
 
 #define io_apic_assign_pci_irqs 0
index 40a4aa3f4061101db8c209ae2ba4e502ffa832d9..337ce5a9b15c86bb7e9ea7747749fed1aee0d2d7 100644 (file)
@@ -3959,6 +3959,18 @@ int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, int node)
        return ret;
 }
 
+bool mp_should_keep_irq(struct device *dev)
+{
+       if (dev->power.is_prepared)
+               return true;
+#ifdef CONFIG_PM_RUNTIME
+       if (dev->power.runtime_status == RPM_SUSPENDING)
+               return true;
+#endif
+
+       return false;
+}
+
 /* Enable IOAPIC early just for system timer */
 void __init pre_init_apic_IRQ0(void)
 {
index 3865116c51fbf583a923d4131882c653b5fc3c24..b9958c364075e949620001cc9d8f02a2715d0128 100644 (file)
@@ -229,7 +229,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
 
 static void intel_mid_pci_irq_disable(struct pci_dev *dev)
 {
-       if (!dev->dev.power.is_prepared && dev->irq > 0)
+       if (!mp_should_keep_irq(&dev->dev) && dev->irq > 0)
                mp_unmap_irq(dev->irq);
 }
 
index bc1a2c341891034d04c86b834c5d132e7f954e33..eb500c2592ad8ab4ced728f676d9102411fa3782 100644 (file)
@@ -1256,7 +1256,7 @@ static int pirq_enable_irq(struct pci_dev *dev)
 
 static void pirq_disable_irq(struct pci_dev *dev)
 {
-       if (io_apic_assign_pci_irqs && !dev->dev.power.is_prepared &&
+       if (io_apic_assign_pci_irqs && !mp_should_keep_irq(&dev->dev) &&
            dev->irq) {
                mp_unmap_irq(dev->irq);
                dev->irq = 0;
index c96887d5289eaed997e29eaab738f8bb4bb488ee..6e6b80eb0bba1e369d36308d5779ec3cc184c4a0 100644 (file)
@@ -484,6 +484,10 @@ void acpi_pci_irq_disable(struct pci_dev *dev)
        /* Keep IOAPIC pin configuration when suspending */
        if (dev->dev.power.is_prepared)
                return;
+#ifdef CONFIG_PM_RUNTIME
+       if (dev->dev.power.runtime_status == RPM_SUSPENDING)
+               return;
+#endif
 
        entry = acpi_pci_irq_lookup(dev, pin);
        if (!entry)