static void __init machine_rk30_board_init(void)
{
- avs_init();
+ //avs_init();
gpio_request(POWER_ON_PIN, "poweronpin");
gpio_direction_output(POWER_ON_PIN, GPIO_HIGH);
* comments : min arm/logic voltage
*/
static struct dvfs_arm_table dvfs_cpu_logic_table[] = {
+#if 0
{.frequency = 252 * 1000, .cpu_volt = 1075 * 1000, .logic_volt = 1125 * 1000},//0.975V/1.000V
- {.frequency = 504 * 1000, .cpu_volt = 1100 * 1000, .logic_volt = 1125 * 1000},//0.975V/1.000V
- {.frequency = 816 * 1000, .cpu_volt = 1125 * 1000, .logic_volt = 1150 * 1000},//1.000V/1.025V
+#endif
+ {.frequency = 504 * 1000, .cpu_volt = 975 * 1000, .logic_volt = 1000 * 1000},//0.975V/1.000V
+ {.frequency = 816 * 1000, .cpu_volt = 1000 * 1000, .logic_volt = 1000 * 1000},//1.000V/1.025V
+ {.frequency = 1200 * 1000, .cpu_volt = 1025 * 1000, .logic_volt = 1000 * 1000},//1.100V/1.050V
+#if 0
{.frequency = 1008 * 1000, .cpu_volt = 1125 * 1000, .logic_volt = 1150 * 1000},//1.025V/1.050V
- {.frequency = 1200 * 1000, .cpu_volt = 1175 * 1000, .logic_volt = 1200 * 1000},//1.100V/1.050V
{.frequency = 1272 * 1000, .cpu_volt = 1225 * 1000, .logic_volt = 1200 * 1000},//1.150V/1.100V
{.frequency = 1416 * 1000, .cpu_volt = 1300 * 1000, .logic_volt = 1200 * 1000},//1.225V/1.100V
{.frequency = 1512 * 1000, .cpu_volt = 1350 * 1000, .logic_volt = 1250 * 1000},//1.300V/1.150V
{.frequency = 1608 * 1000, .cpu_volt = 1425 * 1000, .logic_volt = 1300 * 1000},//1.325V/1.175V
+#endif
{.frequency = CPUFREQ_TABLE_END},
};
static struct cpufreq_frequency_table dvfs_gpu_table[] = {
- {.frequency = 266 * 1000, .index = 1050 * 1000},
- {.frequency = 400 * 1000, .index = 1275 * 1000},
+ {.frequency = 266 * 1000, .index = 1000 * 1000},
+ {.frequency = 400 * 1000, .index = 1000 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
static struct cpufreq_frequency_table dvfs_ddr_table[] = {
- {.frequency = 300 * 1000, .index = 1050 * 1000},
- {.frequency = 400 * 1000, .index = 1125 * 1000},
+ {.frequency = 300 * 1000, .index = 1000 * 1000},
+ {.frequency = 400 * 1000, .index = 1000 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
void dvfs_clk_register_set_rate_callback(struct clk *clk, clk_dvfs_target_callback clk_dvfs_target)\r
{\r
struct clk_node *dvfs_clk = clk_get_dvfs_info(clk);\r
+ if (IS_ERR_OR_NULL(dvfs_clk)){\r
+ DVFS_ERR("%s %s get dvfs_clk err\n", __func__, clk->name);\r
+ return -1;\r
+ }\r
dvfs_clk->clk_dvfs_target = clk_dvfs_target;\r
}\r
\r
volt_dep_new = dvfs_vd_get_newvolt_bypd(&vd_core);\r
if (volt_dep_new <= 0) \r
goto fail_roll_back;\r
-\r
+#ifdef CONFIG_ARCH_RK3066B\r
+ ret = dvfs_scale_volt_direct(dvfs_clk->vd, volt_new);\r
+#else\r
ret = dvfs_scale_volt_bystep(dvfs_clk->vd, &vd_core, volt_new, volt_dep_new, \r
ARM_HIGHER_LOGIC, LOGIC_HIGHER_ARM); \r
+#endif\r
if (ret < 0) \r
goto fail_roll_back;\r
} else {\r
volt_dep_new = dvfs_vd_get_newvolt_bypd(&vd_core);\r
if (volt_dep_new <= 0) \r
goto out;\r
-\r
+#ifdef CONFIG_ARCH_RK3066B\r
+ ret = dvfs_scale_volt_direct(dvfs_clk->vd, volt_new);\r
+#else\r
ret = dvfs_scale_volt_bystep(dvfs_clk->vd, &vd_core, volt_new, volt_dep_new, \r
ARM_HIGHER_LOGIC, LOGIC_HIGHER_ARM); \r
+#endif\r
if (ret < 0) \r
goto out;\r
} else {\r
\r
if (volt_dep_new < 0) \r
goto fail_roll_back;\r
-\r
+#ifdef CONFIG_ARCH_RK3066B\r
+ ret = dvfs_scale_volt_direct(dvfs_clk->vd, volt_new);\r
+#else\r
ret = dvfs_scale_volt_bystep(dvfs_clk->vd, dvfs_clk_cpu->vd, volt_new, volt_dep_new, \r
LOGIC_HIGHER_ARM, ARM_HIGHER_LOGIC); \r
+#endif\r
if (ret < 0) \r
goto fail_roll_back;\r
}\r
\r
if (volt_dep_new < 0) \r
goto out;\r
-\r
+#ifdef CONFIG_ARCH_RK3066B\r
+ ret = dvfs_scale_volt_direct(dvfs_clk->vd, volt_new);\r
+#else\r
ret = dvfs_scale_volt_bystep(dvfs_clk->vd, dvfs_clk_cpu->vd, volt_new, volt_dep_new, \r
LOGIC_HIGHER_ARM, ARM_HIGHER_LOGIC); \r
+#endif\r
if (ret < 0) \r
goto out;\r
}\r