Fix vector sign extend to put the source and destination types in the
authorDavid Greene <greened@obbligato.org>
Mon, 31 Jan 2011 20:39:01 +0000 (20:39 +0000)
committerDavid Greene <greened@obbligato.org>
Mon, 31 Jan 2011 20:39:01 +0000 (20:39 +0000)
correct places.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124601 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/CellSPU/SPUInstrInfo.td

index 6e6874c1400b92117f2db0938f6f106a36b7ab89..25f6fd000b8ba4c139a117b03fb08bd5361c9a65 100644 (file)
@@ -1167,10 +1167,10 @@ class XSHWRegInst<RegisterClass rclass>:
              [(set rclass:$rDest, (sext R16C:$rSrc))]>;
 
 multiclass ExtendHalfwordWord {
-  def v4i32: XSHWVecInst<v4i32, v8i16>;
-  
+  def v4i32: XSHWVecInst<v8i16, v4i32>;
+
   def r16:   XSHWRegInst<R32C>;
-  
+
   def r32:   XSHWInRegInst<R32C,
                           [(set R32C:$rDest, (sext_inreg R32C:$rSrc, i16))]>;
   def r64:   XSHWInRegInst<R64C, [/* no pattern */]>;