[AArch64] Update test case to pass with post-RA MI scheduler.
authorChad Rosier <mcrosier@codeaurora.org>
Sat, 13 Sep 2014 03:23:23 +0000 (03:23 +0000)
committerChad Rosier <mcrosier@codeaurora.org>
Sat, 13 Sep 2014 03:23:23 +0000 (03:23 +0000)
Check that the post RA scheduler is being skipped, regardless of
whether it's the top-down list latency scheduler or the post-RA
MI scheduler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217725 91177308-0d34-0410-b5e6-96231b3b80d8

test/Feature/optnone-llc.ll

index 6cb27d0b7d5c57e5327e6f7c1f368268bac7f2bb..f19fa88f9b2677780460670e83d01919257daeff 100644 (file)
@@ -46,7 +46,7 @@ attributes #0 = { optnone noinline }
 ; LLC-Ox-DAG: Skipping pass 'Merge disjoint stack slots'
 ; LLC-Ox-DAG: Skipping pass 'Optimize machine instruction PHIs'
 ; LLC-Ox-DAG: Skipping pass 'Peephole Optimizations'
-; LLC-Ox-DAG: Skipping pass 'Post RA top-down list latency scheduler'
+; LLC-Ox-DAG: Skipping pass 'Post{{.*}}RA{{.*}}{{[Ss]}}cheduler'
 ; LLC-Ox-DAG: Skipping pass 'Remove dead machine instructions'
 ; LLC-Ox-DAG: Skipping pass 'Tail Duplication'