Set ARM if-conversion block size threshold to 10 instructions for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37194 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index d30a288d1988359d9cf1da701c4aa7d578fb8b05..a598fb2c8f868779d70d76e09b452438f3eb52b8 100644 (file)
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -124,6 +124,7 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
     addRegisterClass(MVT::f32, ARM::SPRRegisterClass);
     addRegisterClass(MVT::f64, ARM::DPRRegisterClass);
   }
+  computeRegisterProperties();
 
   // ARM does not have f32 extending load.
   setLoadXAction(ISD::EXTLOAD, MVT::f32, Expand);
@@ -252,9 +253,8 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
   setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom);
 
   setStackPointerRegisterToSaveRestore(ARM::SP);
-
   setSchedulingPreference(SchedulingForRegPressure);
-  computeRegisterProperties();
+  setIfCvtBlockSizeLimit(Subtarget->isThumb() ? 0 : 10);
 
   maxStoresPerMemcpy = 1;   //// temporary - rewrite interface to use type
 }