According to the databook, 10.2us is the max time for
dll to be ready to work. However from the test, some chips
need 20us for dll to ready. So this patch add some extra
margin for dllrdy to be ready to meet the reality.
Change-Id: Ie5362b4403309d260ac621b8b20a0f5b579d3153
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
PHYCTRL_ENDLL_SHIFT));
/*
* After enable analog DLL circuits, we need extra 10.2us
- * for dll to be ready for work.
+ * for dll to be ready for work. But according to the test, we
+ * find some chips need more than 25us.
*/
- udelay(11);
+ udelay(30);
regmap_read(rk_phy->reg_base,
rk_phy->reg_offset + GRF_EMMCPHY_STATUS,
&dllrdy);