drm/radeon/dce32+: use fractional fb dividers for high clocks
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 13 Nov 2012 23:03:41 +0000 (18:03 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Sat, 8 Dec 2012 00:48:22 +0000 (19:48 -0500)
Fixes flickering with some high res montiors.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
CC: stable@vger.kernel.org
drivers/gpu/drm/radeon/atombios_crtc.c

index 24d932f5320324fcdb726185a08481b4738e9ccf..9175615bbd8a158d8d38a071f0fc87e30c78f688 100644 (file)
@@ -561,6 +561,8 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
                /* use frac fb div on APUs */
                if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE61(rdev))
                        radeon_crtc->pll_flags |= RADEON_PLL_USE_FRAC_FB_DIV;
+               if (ASIC_IS_DCE32(rdev) && mode->clock > 165000)
+                       radeon_crtc->pll_flags |= RADEON_PLL_USE_FRAC_FB_DIV;
        } else {
                radeon_crtc->pll_flags |= RADEON_PLL_LEGACY;