*/
#ifdef CONFIG_SPIM0_RK29
static struct spi_cs_gpio rk29xx_spi0_cs_gpios[SPI_CHIPSELECT_NUM] = {
+#if 0
{
.name = "spi0 cs0",
.cs_gpio = RK2928_PIN1_PB3,
.cs_iomux_name = GPIO1B4_SPI_CSN1_UART1_CTSN_NAME,//if no iomux,set it NULL
.cs_iomux_mode = GPIO1B_SPI_CSN1,
},
+#endif
};
static struct rk29xx_spi_platform_data rk29xx_spi0_platdata = {
*/
#ifdef CONFIG_SPIM0_RK29
static struct spi_cs_gpio rk29xx_spi0_cs_gpios[SPI_CHIPSELECT_NUM] = {
+#if 0
#if defined(CONFIG_ARCH_RK3066B)
{
.name = "spi0 cs0",
.cs_iomux_mode = GPIO4B_SPI0_CSN1,
}
#endif
+#endif
};
static struct rk29xx_spi_platform_data rk29xx_spi0_platdata = {
#ifdef CONFIG_SPIM1_RK29
static struct spi_cs_gpio rk29xx_spi1_cs_gpios[SPI_CHIPSELECT_NUM] = {
+#if 0
#if defined(CONFIG_ARCH_RK3066B)
{
.name = "spi1 cs0",
.cs_iomux_mode = GPIO2C_SPI1_CSN1,
}
#endif
+#endif
};
static struct rk29xx_spi_platform_data rk29xx_spi1_platdata = {
#endif
#ifdef CONFIG_SPIM0_RK29
- SPI0_CLK, SPI0_TXD, SPI0_RXD, SPI0_CSN0,
+ SPI0_CLK, SPI0_TXD, SPI0_RXD, SPI0_CS0,
#endif
#ifdef CONFIG_SPIM1_RK29
- SPI1_CLK, SPI1_TXD, SPI1_RXD, SPI1_CSN0,
+ SPI1_CLK, SPI1_TXD, SPI1_RXD, SPI1_CS0,
#endif
#ifdef CONFIG_I2C0_RK30
u8 cs; /* chip select pin */\r
u8 n_bytes; /* current is a 1/2/4 byte op */\r
u8 tmode; /* TR/TO/RO/EEPROM */\r
+ u8 mode; /* ??? */\r
u8 type; /* SPI/SSP/MicroWire */\r
\r
u8 poll_mode; /* 1 means use poll mode */\r
}\r
#endif\r
\r
+#if 0\r
static void spi_dump_regs(struct rk29xx_spi *dws) {\r
DBG("MRST SPI0 registers:\n");\r
DBG("=================================\n");\r
DBG("=================================\n");\r
\r
}\r
+#endif\r
\r
#ifdef CONFIG_DEBUG_FS\r
static int spi_show_regs_open(struct inode *inode, struct file *file)\r
rk29xx_writel(dws, SPIM_SER, 0);\r
return;\r
#else\r
+ \r
+ #error "Warning: not support"\r
struct rk29xx_spi_platform_data *pdata = dws->master->dev.platform_data;\r
struct spi_cs_gpio *cs_gpios = pdata->chipselect_gpios;\r
\r