-#include <linux/fb.h>\r
-#include <linux/delay.h>\r
-#include <mach/gpio.h>\r
-#include <mach/iomux.h>\r
-#include <mach/board.h>\r
-#include "screen.h"\r
-#include <linux/hdmi.h>\r
-#include "../../rk29_fb.h"\r
-\r
-\r
-/* Base */\r
-#define OUT_TYPE SCREEN_LVDS\r
-\r
-#define OUT_FORMAT LVDS_8BIT_2\r
-#define OUT_FACE OUT_D888_P666 \r
-#define OUT_CLK 65000000\r
-#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ\r
-\r
-/* Timing */\r
-#define H_PW 10\r
-#define H_BP 100\r
-#define H_VD 1024\r
-#define H_FP 210\r
-\r
-#define V_PW 10\r
-#define V_BP 10\r
-#define V_VD 768\r
-#define V_FP 18\r
-\r
-#define LCD_WIDTH 202\r
-#define LCD_HEIGHT 152\r
-\r
-/* scaler Timing */\r
-//1920*1080*60\r
-#define S_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4\r
-#define S_H_PW 100\r
-#define S_H_BP 100\r
-#define S_H_VD 1024\r
-#define S_H_FP 151\r
-\r
-#define S_V_PW 5\r
-#define S_V_BP 15\r
-#define S_V_VD 768\r
-#define S_V_FP 12\r
-\r
-#define S_H_ST 1757\r
-#define S_V_ST 14\r
-\r
-//1920*1080*50\r
-#define S1_OUT_CLK SCALE_RATE(148500000,54000000) //m=16 n=11 no=4 \r
-#define S1_H_PW 100\r
-#define S1_H_BP 100\r
-#define S1_H_VD 1024\r
-#define S1_H_FP 126\r
-\r
-#define S1_V_PW 5\r
-#define S1_V_BP 15\r
-#define S1_V_VD 768\r
-#define S1_V_FP 12\r
-\r
-#define S1_H_ST 1757\r
-#define S1_V_ST 14\r
-\r
-//1280*720*60\r
-#define S2_OUT_CLK SCALE_RATE(74250000,66000000) //m=32 n=9 no=4\r
-#define S2_H_PW 100\r
-#define S2_H_BP 100\r
-#define S2_H_VD 1024\r
-#define S2_H_FP 151\r
-\r
-#define S2_V_PW 5\r
-#define S2_V_BP 15\r
-#define S2_V_VD 768\r
-#define S2_V_FP 12\r
-\r
-#define S2_H_ST 0\r
-#define S2_V_ST 12\r
-//1280*720*50\r
-\r
-#define S3_OUT_CLK SCALE_RATE(74250000,54000000) // m=32 n=11 no=4 \r
-#define S3_H_PW 100\r
-#define S3_H_BP 100\r
-#define S3_H_VD 1024\r
-#define S3_H_FP 151\r
-\r
-#define S3_V_PW 5\r
-#define S3_V_BP 15\r
-#define S3_V_VD 768\r
-#define S3_V_FP 12\r
-\r
-#define S3_H_ST 0\r
-#define S3_V_ST 12\r
-\r
-//720*576*50\r
-#define S4_OUT_CLK SCALE_RATE(27000000,54375000) //m=145 n=9 no=8 \r
-#define S4_H_PW 100\r
-#define S4_H_BP 100\r
-#define S4_H_VD 1024\r
-#define S4_H_FP 81\r
-\r
-#define S4_V_PW 5\r
-#define S4_V_BP 15\r
-#define S4_V_VD 768\r
-#define S4_V_FP 45\r
-\r
-\r
-#define S4_H_ST 435\r
-#define S4_V_ST 45\r
-//720*480*60\r
-#define S5_OUT_CLK SCALE_RATE(27000000,72000000) //m=32 n=3 no=4 \r
-#define S5_H_PW 100\r
-#define S5_H_BP 100\r
-#define S5_H_VD 1024\r
-#define S5_H_FP 81\r
-\r
-#define S5_V_PW 5\r
-#define S5_V_BP 15\r
-#define S5_V_VD 768\r
-#define S5_V_FP 51\r
-\r
-#define S5_H_ST 858\r
-#define S5_V_ST 45\r
-\r
-#define S_DCLK_POL 0\r
-\r
-/* Other */\r
-#define DCLK_POL 0\r
-#define SWAP_RB 0 \r
-\r
-#if ( defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) ) || defined(CONFIG_HDMI_DUAL_DISP)\r
-static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution)\r
-{\r
- screen->s_clk_inv = S_DCLK_POL;\r
- screen->s_den_inv = 0;\r
- screen->s_hv_sync_inv = 0;\r
- switch(hdmi_resolution){\r
- case HDMI_1920x1080p_60Hz:\r
- /* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S_OUT_CLK;\r
- screen->s_hsync_len = S_H_PW;\r
- screen->s_left_margin = S_H_BP;\r
- screen->s_right_margin = S_H_FP;\r
- screen->s_hsync_len = S_H_PW;\r
- screen->s_upper_margin = S_V_BP;\r
- screen->s_lower_margin = S_V_FP;\r
- screen->s_vsync_len = S_V_PW;\r
- screen->s_hsync_st = S_H_ST;\r
- screen->s_vsync_st = S_V_ST;\r
- break;\r
- case HDMI_1920x1080p_50Hz:\r
- /* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S1_OUT_CLK;\r
- screen->s_hsync_len = S1_H_PW;\r
- screen->s_left_margin = S1_H_BP;\r
- screen->s_right_margin = S1_H_FP;\r
- screen->s_hsync_len = S1_H_PW;\r
- screen->s_upper_margin = S1_V_BP;\r
- screen->s_lower_margin = S1_V_FP;\r
- screen->s_vsync_len = S1_V_PW;\r
- screen->s_hsync_st = S1_H_ST;\r
- screen->s_vsync_st = S1_V_ST;\r
- break;\r
- case HDMI_1280x720p_60Hz:\r
- /* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S2_OUT_CLK;\r
- screen->s_hsync_len = S2_H_PW;\r
- screen->s_left_margin = S2_H_BP;\r
- screen->s_right_margin = S2_H_FP;\r
- screen->s_hsync_len = S2_H_PW;\r
- screen->s_upper_margin = S2_V_BP;\r
- screen->s_lower_margin = S2_V_FP;\r
- screen->s_vsync_len = S2_V_PW;\r
- screen->s_hsync_st = S2_H_ST;\r
- screen->s_vsync_st = S2_V_ST;\r
- break;\r
- case HDMI_1280x720p_50Hz:\r
- /* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S3_OUT_CLK;\r
- screen->s_hsync_len = S3_H_PW;\r
- screen->s_left_margin = S3_H_BP;\r
- screen->s_right_margin = S3_H_FP;\r
- screen->s_hsync_len = S3_H_PW;\r
- screen->s_upper_margin = S3_V_BP;\r
- screen->s_lower_margin = S3_V_FP;\r
- screen->s_vsync_len = S3_V_PW;\r
- screen->s_hsync_st = S3_H_ST;\r
- screen->s_vsync_st = S3_V_ST;\r
- break;\r
- case HDMI_720x576p_50Hz_4x3:\r
- case HDMI_720x576p_50Hz_16x9:\r
- /* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S4_OUT_CLK;\r
- screen->s_hsync_len = S4_H_PW;\r
- screen->s_left_margin = S4_H_BP;\r
- screen->s_right_margin = S4_H_FP;\r
- screen->s_hsync_len = S4_H_PW;\r
- screen->s_upper_margin = S4_V_BP;\r
- screen->s_lower_margin = S4_V_FP;\r
- screen->s_vsync_len = S4_V_PW;\r
- screen->s_hsync_st = S4_H_ST;\r
- screen->s_vsync_st = S4_V_ST;\r
- break;\r
- case HDMI_720x480p_60Hz_16x9:\r
- case HDMI_720x480p_60Hz_4x3:\r
- /* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S5_OUT_CLK;\r
- screen->s_hsync_len = S5_H_PW;\r
- screen->s_left_margin = S5_H_BP;\r
- screen->s_right_margin = S5_H_FP;\r
- screen->s_hsync_len = S5_H_PW;\r
- screen->s_upper_margin = S5_V_BP;\r
- screen->s_lower_margin = S5_V_FP;\r
- screen->s_vsync_len = S5_V_PW;\r
- screen->s_hsync_st = S5_H_ST;\r
- screen->s_vsync_st = S5_V_ST;\r
- break;\r
- default :\r
- printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution);\r
- return -1;\r
- break;\r
- }\r
- \r
- return 0;\r
-}\r
-#else\r
-static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){}\r
-#endif\r
-\r
-void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info )\r
-{\r
- /* screen type & face */\r
- screen->type = OUT_TYPE;\r
- screen->face = OUT_FACE;\r
- screen->hw_format = OUT_FORMAT;\r
- \r
- /* Screen size */\r
- screen->x_res = H_VD;\r
- screen->y_res = V_VD;\r
-\r
- screen->width = LCD_WIDTH;\r
- screen->height = LCD_HEIGHT;\r
-\r
- /* Timing */\r
- screen->lcdc_aclk = LCDC_ACLK;\r
- screen->pixclock = OUT_CLK;\r
- screen->left_margin = H_BP;\r
- screen->right_margin = H_FP;\r
- screen->hsync_len = H_PW;\r
- screen->upper_margin = V_BP;\r
- screen->lower_margin = V_FP;\r
- screen->vsync_len = V_PW;\r
- \r
- /* Pin polarity */\r
- screen->pin_hsync = 0;\r
- screen->pin_vsync = 0;\r
- screen->pin_den = 0;\r
- screen->pin_dclk = DCLK_POL;\r
-\r
- /* Swap rule */\r
- screen->swap_rb = SWAP_RB;\r
- screen->swap_rg = 0;\r
- screen->swap_gb = 0;\r
- screen->swap_delta = 0;\r
- screen->swap_dumy = 0;\r
-\r
- /* Operation function*/\r
- screen->init = NULL;\r
- screen->standby = NULL;\r
- screen->sscreen_get = set_scaler_info;\r
-#ifdef CONFIG_RK610_LVDS\r
- screen->sscreen_set = rk610_lcd_scaler_set_param;\r
-#endif\r
-}\r
-\r
-size_t get_fb_size(void)\r
-{\r
- size_t size = 0;\r
- #if defined(CONFIG_THREE_FB_BUFFER)\r
- size = ((H_VD)*(V_VD)<<2)* 3; //three buffer\r
- #else\r
- size = ((H_VD)*(V_VD)<<2)<<1; //two buffer\r
- #endif\r
- return ALIGN(size,SZ_1M);\r
-}\r
-\r
+#include <linux/delay.h>
+#include <mach/gpio.h>
+#include <mach/iomux.h>
+#include <mach/board.h>
+#include <linux/rk_fb.h>
+#if defined(CONFIG_RK_HDMI)
+#include "../../rockchip/hdmi/rk_hdmi.h"
+#endif
+#ifdef CONFIG_RK610_LVDS
+#include "../transmitter/rk610_lcd.h"
+#endif
+
+
+/* Base */
+#define OUT_TYPE SCREEN_LVDS
+
+#define OUT_FORMAT LVDS_8BIT_2
+#define OUT_FACE OUT_D888_P666
+#define OUT_CLK 65000000
+#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ
+
+/* Timing */
+#define H_PW 10
+#define H_BP 100
+#define H_VD 1024
+#define H_FP 210
+
+#define V_PW 10
+#define V_BP 10
+#define V_VD 768
+#define V_FP 18
+
+#define LCD_WIDTH 202
+#define LCD_HEIGHT 152
+
+/* scaler Timing */
+//1920*1080*60
+#define S_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4
+#define S_H_PW 100
+#define S_H_BP 100
+#define S_H_VD 1024
+#define S_H_FP 151
+
+#define S_V_PW 5
+#define S_V_BP 15
+#define S_V_VD 768
+#define S_V_FP 12
+
+#define S_H_ST 1757
+#define S_V_ST 14
+
+//1920*1080*50
+#define S1_OUT_CLK SCALE_RATE(148500000,54000000) //m=16 n=11 no=4
+#define S1_H_PW 100
+#define S1_H_BP 100
+#define S1_H_VD 1024
+#define S1_H_FP 126
+
+#define S1_V_PW 5
+#define S1_V_BP 15
+#define S1_V_VD 768
+#define S1_V_FP 12
+
+#define S1_H_ST 1757
+#define S1_V_ST 14
+
+//1280*720*60
+#define S2_OUT_CLK SCALE_RATE(74250000,66000000) //m=32 n=9 no=4
+#define S2_H_PW 100
+#define S2_H_BP 100
+#define S2_H_VD 1024
+#define S2_H_FP 151
+
+#define S2_V_PW 5
+#define S2_V_BP 15
+#define S2_V_VD 768
+#define S2_V_FP 12
+
+#define S2_H_ST 0
+#define S2_V_ST 12
+//1280*720*50
+
+#define S3_OUT_CLK SCALE_RATE(74250000,54000000) // m=32 n=11 no=4
+#define S3_H_PW 100
+#define S3_H_BP 100
+#define S3_H_VD 1024
+#define S3_H_FP 151
+
+#define S3_V_PW 5
+#define S3_V_BP 15
+#define S3_V_VD 768
+#define S3_V_FP 12
+
+#define S3_H_ST 0
+#define S3_V_ST 12
+
+//720*576*50
+#define S4_OUT_CLK SCALE_RATE(27000000,54375000) //m=145 n=9 no=8
+#define S4_H_PW 100
+#define S4_H_BP 100
+#define S4_H_VD 1024
+#define S4_H_FP 81
+
+#define S4_V_PW 5
+#define S4_V_BP 15
+#define S4_V_VD 768
+#define S4_V_FP 45
+
+
+#define S4_H_ST 435
+#define S4_V_ST 45
+//720*480*60
+#define S5_OUT_CLK SCALE_RATE(27000000,72000000) //m=32 n=3 no=4
+#define S5_H_PW 100
+#define S5_H_BP 100
+#define S5_H_VD 1024
+#define S5_H_FP 81
+
+#define S5_V_PW 5
+#define S5_V_BP 15
+#define S5_V_VD 768
+#define S5_V_FP 51
+
+#define S5_H_ST 858
+#define S5_V_ST 45
+
+#define S_DCLK_POL 0
+
+/* Other */
+#define DCLK_POL 0
+
+#define DEN_POL 0
+#define VSYNC_POL 0
+#define HSYNC_POL 0
+
+#define SWAP_RB 0
+#define SWAP_RG 0
+#define SWAP_GB 0
+
+
+#if ( defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) ) || defined(CONFIG_HDMI_DUAL_DISP)
+static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution)
+{
+ screen->s_clk_inv = S_DCLK_POL;
+ screen->s_den_inv = 0;
+ screen->s_hv_sync_inv = 0;
+ switch(hdmi_resolution){
+ case HDMI_1920x1080p_60Hz:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S_OUT_CLK;
+ screen->s_hsync_len = S_H_PW;
+ screen->s_left_margin = S_H_BP;
+ screen->s_right_margin = S_H_FP;
+ screen->s_hsync_len = S_H_PW;
+ screen->s_upper_margin = S_V_BP;
+ screen->s_lower_margin = S_V_FP;
+ screen->s_vsync_len = S_V_PW;
+ screen->s_hsync_st = S_H_ST;
+ screen->s_vsync_st = S_V_ST;
+ break;
+ case HDMI_1920x1080p_50Hz:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S1_OUT_CLK;
+ screen->s_hsync_len = S1_H_PW;
+ screen->s_left_margin = S1_H_BP;
+ screen->s_right_margin = S1_H_FP;
+ screen->s_hsync_len = S1_H_PW;
+ screen->s_upper_margin = S1_V_BP;
+ screen->s_lower_margin = S1_V_FP;
+ screen->s_vsync_len = S1_V_PW;
+ screen->s_hsync_st = S1_H_ST;
+ screen->s_vsync_st = S1_V_ST;
+ break;
+ case HDMI_1280x720p_60Hz:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S2_OUT_CLK;
+ screen->s_hsync_len = S2_H_PW;
+ screen->s_left_margin = S2_H_BP;
+ screen->s_right_margin = S2_H_FP;
+ screen->s_hsync_len = S2_H_PW;
+ screen->s_upper_margin = S2_V_BP;
+ screen->s_lower_margin = S2_V_FP;
+ screen->s_vsync_len = S2_V_PW;
+ screen->s_hsync_st = S2_H_ST;
+ screen->s_vsync_st = S2_V_ST;
+ break;
+ case HDMI_1280x720p_50Hz:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S3_OUT_CLK;
+ screen->s_hsync_len = S3_H_PW;
+ screen->s_left_margin = S3_H_BP;
+ screen->s_right_margin = S3_H_FP;
+ screen->s_hsync_len = S3_H_PW;
+ screen->s_upper_margin = S3_V_BP;
+ screen->s_lower_margin = S3_V_FP;
+ screen->s_vsync_len = S3_V_PW;
+ screen->s_hsync_st = S3_H_ST;
+ screen->s_vsync_st = S3_V_ST;
+ break;
+ case HDMI_720x576p_50Hz_4_3:
+ case HDMI_720x576p_50Hz_16_9:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S4_OUT_CLK;
+ screen->s_hsync_len = S4_H_PW;
+ screen->s_left_margin = S4_H_BP;
+ screen->s_right_margin = S4_H_FP;
+ screen->s_hsync_len = S4_H_PW;
+ screen->s_upper_margin = S4_V_BP;
+ screen->s_lower_margin = S4_V_FP;
+ screen->s_vsync_len = S4_V_PW;
+ screen->s_hsync_st = S4_H_ST;
+ screen->s_vsync_st = S4_V_ST;
+ break;
+ case HDMI_720x480p_60Hz_16_9:
+ case HDMI_720x480p_60Hz_4_3:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S5_OUT_CLK;
+ screen->s_hsync_len = S5_H_PW;
+ screen->s_left_margin = S5_H_BP;
+ screen->s_right_margin = S5_H_FP;
+ screen->s_hsync_len = S5_H_PW;
+ screen->s_upper_margin = S5_V_BP;
+ screen->s_lower_margin = S5_V_FP;
+ screen->s_vsync_len = S5_V_PW;
+ screen->s_hsync_st = S5_H_ST;
+ screen->s_vsync_st = S5_V_ST;
+ break;
+ default :
+ printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution);
+ return -1;
+ break;
+ }
+
+ return 0;
+}
+#else
+static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){return 0;}
+#endif
+
+void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info )
+{
+ /* screen type & face */
+ screen->type = OUT_TYPE;
+ screen->face = OUT_FACE;
+ screen->hw_format = OUT_FORMAT;
+
+ /* Screen size */
+ screen->x_res = H_VD;
+ screen->y_res = V_VD;
+
+ screen->width = LCD_WIDTH;
+ screen->height = LCD_HEIGHT;
+
+ /* Timing */
+ screen->lcdc_aclk = LCDC_ACLK;
+ screen->pixclock = OUT_CLK;
+ screen->left_margin = H_BP;
+ screen->right_margin = H_FP;
+ screen->hsync_len = H_PW;
+ screen->upper_margin = V_BP;
+ screen->lower_margin = V_FP;
+ screen->vsync_len = V_PW;
+
+ /* Pin polarity */
+ screen->pin_hsync = HSYNC_POL;
+ screen->pin_vsync = VSYNC_POL;
+ screen->pin_den = DEN_POL;
+ screen->pin_dclk = DCLK_POL;
+
+ /* Swap rule */
+ screen->swap_rb = SWAP_RB;
+ screen->swap_rg = SWAP_RG;
+ screen->swap_gb = SWAP_GB;
+ screen->swap_delta = 0;
+ screen->swap_dumy = 0;
+
+ /* Operation function*/
+ screen->init = NULL;
+ screen->standby = NULL;
+ screen->sscreen_get = set_scaler_info;
+#ifdef CONFIG_RK610_LVDS
+ screen->sscreen_set = rk610_lcd_scaler_set_param;
+#endif
+}
+
+size_t get_fb_size(void)
+{
+ size_t size = 0;
+ #if defined(CONFIG_THREE_FB_BUFFER)
+ size = ((H_VD)*(V_VD)<<2)* 3; //three buffer
+ #else
+ size = ((H_VD)*(V_VD)<<2)<<1; //two buffer
+ #endif
+ return ALIGN(size,SZ_1M);
+}
+
-#include <linux/fb.h>\r
-#include <linux/delay.h>\r
-#include <mach/gpio.h>\r
-#include <mach/iomux.h>\r
-#include <mach/board.h>\r
-#include "screen.h"\r
-#include <linux/hdmi.h>\r
-#include "../../rk29_fb.h"\r
-#include "../transmitter/rk610_lcd.h"\r
-\r
-\r
-/* Base */\r
-#define OUT_TYPE SCREEN_LVDS\r
-\r
-#define OUT_FORMAT LVDS_8BIT_2\r
-\r
-#define OUT_FACE OUT_D888_P666 \r
-#define OUT_CLK 65000000\r
-#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ\r
-\r
-\r
-/* Timing */\r
-#define H_PW 10\r
-#define H_BP 10\r
-#define H_VD 1280\r
-#define H_FP 20\r
-\r
-#define V_PW 10\r
-#define V_BP 10\r
-#define V_VD 800\r
-#define V_FP 13\r
-\r
-#define LCD_WIDTH 202\r
-#define LCD_HEIGHT 152\r
-\r
-/* scaler Timing */\r
-//1920*1080*60\r
-\r
-#define S_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4\r
-#define S_H_PW 10\r
-#define S_H_BP 10\r
-#define S_H_VD 1280\r
-#define S_H_FP 20\r
-\r
-#define S_V_PW 10\r
-#define S_V_BP 10\r
-#define S_V_VD 800\r
-#define S_V_FP 13\r
-\r
-#define S_H_ST 440\r
-#define S_V_ST 13\r
-\r
-//1920*1080*50\r
-#define S1_OUT_CLK SCALE_RATE(148500000,57375000) //m=17 n=11 no=4 \r
-#define S1_H_PW 10\r
-#define S1_H_BP 10\r
-#define S1_H_VD 1280\r
-#define S1_H_FP 77\r
-\r
-#define S1_V_PW 10\r
-#define S1_V_BP 10\r
-#define S1_V_VD 800\r
-#define S1_V_FP 13\r
-\r
-#define S1_H_ST 459\r
-#define S1_V_ST 13\r
-\r
-//1280*720*60\r
-#define S2_OUT_CLK SCALE_RATE(74250000,66000000) //m=32 n=9 no=4\r
-#define S2_H_PW 10\r
-#define S2_H_BP 10\r
-#define S2_H_VD 1280\r
-#define S2_H_FP 20\r
-\r
-#define S2_V_PW 10\r
-#define S2_V_BP 10\r
-#define S2_V_VD 800\r
-#define S2_V_FP 13\r
-\r
-#define S2_H_ST 440\r
-#define S2_V_ST 13\r
-\r
-//1280*720*50\r
-\r
-#define S3_OUT_CLK SCALE_RATE(74250000,57375000) // m=34 n=11 no=4\r
-#define S3_H_PW 10\r
-#define S3_H_BP 10\r
-#define S3_H_VD 1280\r
-#define S3_H_FP 77\r
-\r
-#define S3_V_PW 10\r
-#define S3_V_BP 10\r
-#define S3_V_VD 800\r
-#define S3_V_FP 13\r
-\r
-#define S3_H_ST 459\r
-#define S3_V_ST 13\r
-\r
-//720*576*50\r
-#define S4_OUT_CLK SCALE_RATE(27000000,63281250) //m=75 n=4 no=8\r
-#define S4_H_PW 10\r
-#define S4_H_BP 10\r
-#define S4_H_VD 1280\r
-#define S4_H_FP 185\r
-\r
-#define S4_V_PW 10\r
-#define S4_V_BP 10\r
-#define S4_V_VD 800\r
-#define S4_V_FP 48\r
-\r
-#define S4_H_ST 81\r
-#define S4_V_ST 48\r
-\r
-//720*480*60\r
-#define S5_OUT_CLK SCALE_RATE(27000000,75000000) //m=100 n=9 no=4\r
-#define S5_H_PW 10\r
-#define S5_H_BP 10\r
-#define S5_H_VD 1280\r
-#define S5_H_FP 130\r
-\r
-#define S5_V_PW 10\r
-#define S5_V_BP 10\r
-#define S5_V_VD 800\r
-#define S5_V_FP 54\r
-\r
-#define S5_H_ST 476\r
-#define S5_V_ST 48\r
-\r
-#define S_DCLK_POL 0\r
-\r
-/* Other */\r
-#define DCLK_POL 0\r
-#define SWAP_RB 0 \r
-\r
-#if ( defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) ) || defined(CONFIG_HDMI_DUAL_DISP)\r
-static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution)\r
-{\r
- screen->s_clk_inv = S_DCLK_POL;\r
- screen->s_den_inv = 0;\r
- screen->s_hv_sync_inv = 0;\r
- switch(hdmi_resolution){\r
- case HDMI_1920x1080p_60Hz:\r
- /* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S_OUT_CLK;\r
- screen->s_hsync_len = S_H_PW;\r
- screen->s_left_margin = S_H_BP;\r
- screen->s_right_margin = S_H_FP;\r
- screen->s_hsync_len = S_H_PW;\r
- screen->s_upper_margin = S_V_BP;\r
- screen->s_lower_margin = S_V_FP;\r
- screen->s_vsync_len = S_V_PW;\r
- screen->s_hsync_st = S_H_ST;\r
- screen->s_vsync_st = S_V_ST;\r
- break;\r
- case HDMI_1920x1080p_50Hz:\r
- /* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S1_OUT_CLK;\r
- screen->s_hsync_len = S1_H_PW;\r
- screen->s_left_margin = S1_H_BP;\r
- screen->s_right_margin = S1_H_FP;\r
- screen->s_hsync_len = S1_H_PW;\r
- screen->s_upper_margin = S1_V_BP;\r
- screen->s_lower_margin = S1_V_FP;\r
- screen->s_vsync_len = S1_V_PW;\r
- screen->s_hsync_st = S1_H_ST;\r
- screen->s_vsync_st = S1_V_ST;\r
- break;\r
- case HDMI_1280x720p_60Hz:\r
- /* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S2_OUT_CLK;\r
- screen->s_hsync_len = S2_H_PW;\r
- screen->s_left_margin = S2_H_BP;\r
- screen->s_right_margin = S2_H_FP;\r
- screen->s_hsync_len = S2_H_PW;\r
- screen->s_upper_margin = S2_V_BP;\r
- screen->s_lower_margin = S2_V_FP;\r
- screen->s_vsync_len = S2_V_PW;\r
- screen->s_hsync_st = S2_H_ST;\r
- screen->s_vsync_st = S2_V_ST;\r
- break;\r
- case HDMI_1280x720p_50Hz:\r
- /* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S3_OUT_CLK;\r
- screen->s_hsync_len = S3_H_PW;\r
- screen->s_left_margin = S3_H_BP;\r
- screen->s_right_margin = S3_H_FP;\r
- screen->s_hsync_len = S3_H_PW;\r
- screen->s_upper_margin = S3_V_BP;\r
- screen->s_lower_margin = S3_V_FP;\r
- screen->s_vsync_len = S3_V_PW;\r
- screen->s_hsync_st = S3_H_ST;\r
- screen->s_vsync_st = S3_V_ST;\r
- break;\r
- case HDMI_720x576p_50Hz_4x3:\r
- case HDMI_720x576p_50Hz_16x9:\r
- /* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S4_OUT_CLK;\r
- screen->s_hsync_len = S4_H_PW;\r
- screen->s_left_margin = S4_H_BP;\r
- screen->s_right_margin = S4_H_FP;\r
- screen->s_hsync_len = S4_H_PW;\r
- screen->s_upper_margin = S4_V_BP;\r
- screen->s_lower_margin = S4_V_FP;\r
- screen->s_vsync_len = S4_V_PW;\r
- screen->s_hsync_st = S4_H_ST;\r
- screen->s_vsync_st = S4_V_ST;\r
- break;\r
- case HDMI_720x480p_60Hz_16x9:\r
- case HDMI_720x480p_60Hz_4x3:\r
- /* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S5_OUT_CLK;\r
- screen->s_hsync_len = S5_H_PW;\r
- screen->s_left_margin = S5_H_BP;\r
- screen->s_right_margin = S5_H_FP;\r
- screen->s_hsync_len = S5_H_PW;\r
- screen->s_upper_margin = S5_V_BP;\r
- screen->s_lower_margin = S5_V_FP;\r
- screen->s_vsync_len = S5_V_PW;\r
- screen->s_hsync_st = S5_H_ST;\r
- screen->s_vsync_st = S5_V_ST;\r
- break;\r
- default :\r
- printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution);\r
- return -1;\r
- break;\r
- }\r
- \r
- return 0;\r
-}\r
-#else\r
-static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){}\r
-#endif\r
-void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info )\r
-{\r
- /* screen type & face */\r
- screen->type = OUT_TYPE;\r
- screen->face = OUT_FACE;\r
- screen->hw_format = OUT_FORMAT;\r
- \r
- /* Screen size */\r
- screen->x_res = H_VD;\r
- screen->y_res = V_VD;\r
-\r
- screen->width = LCD_WIDTH;\r
- screen->height = LCD_HEIGHT;\r
-\r
- /* Timing */\r
- screen->lcdc_aclk = LCDC_ACLK;\r
- screen->pixclock = OUT_CLK;\r
- screen->left_margin = H_BP;\r
- screen->right_margin = H_FP;\r
- screen->hsync_len = H_PW;\r
- screen->upper_margin = V_BP;\r
- screen->lower_margin = V_FP;\r
- screen->vsync_len = V_PW;\r
- \r
- /* Pin polarity */\r
- screen->pin_hsync = 0;\r
- screen->pin_vsync = 0;\r
- screen->pin_den = 0;\r
- screen->pin_dclk = DCLK_POL;\r
-\r
- /* Swap rule */\r
- screen->swap_rb = SWAP_RB;\r
- screen->swap_rg = 0;\r
- screen->swap_gb = 0;\r
- screen->swap_delta = 0;\r
- screen->swap_dumy = 0;\r
-\r
- /* Operation function*/\r
- screen->init = NULL;\r
- screen->standby = NULL;\r
- screen->sscreen_get = set_scaler_info;\r
- screen->sscreen_set = rk610_lcd_scaler_set_param;\r
-}\r
-\r
-\r
-size_t get_fb_size(void)\r
-{\r
- size_t size = 0;\r
- #if defined(CONFIG_THREE_FB_BUFFER)\r
- size = ((H_VD)*(V_VD)<<2)* 3; //three buffer\r
- #else\r
- size = ((H_VD)*(V_VD)<<2)<<1; //two buffer\r
- #endif\r
- return ALIGN(size,SZ_1M);\r
-}\r
-\r
+#include <linux/delay.h>
+#include <mach/gpio.h>
+#include <mach/iomux.h>
+#include <mach/board.h>
+#include <linux/rk_fb.h>
+#if defined(CONFIG_RK_HDMI)
+#include "../../rockchip/hdmi/rk_hdmi.h"
+#endif
+#ifdef CONFIG_RK610_LVDS
+#include "../transmitter/rk610_lcd.h"
+#endif
+
+
+
+/* Base */
+#define OUT_TYPE SCREEN_LVDS
+
+#define OUT_FORMAT LVDS_8BIT_2
+
+#define OUT_FACE OUT_D888_P666
+#define OUT_CLK 65000000
+#define LCDC_ACLK 500000000//312000000 //29 lcdc axi DMA ƵÂÊ
+
+
+/* Timing */
+#define H_PW 10
+#define H_BP 10
+#define H_VD 1280
+#define H_FP 20
+
+#define V_PW 10
+#define V_BP 10
+#define V_VD 800
+#define V_FP 13
+
+#define LCD_WIDTH 202
+#define LCD_HEIGHT 152
+
+/* scaler Timing */
+//1920*1080*60
+
+#define S_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4
+#define S_H_PW 10
+#define S_H_BP 10
+#define S_H_VD 1280
+#define S_H_FP 20
+
+#define S_V_PW 10
+#define S_V_BP 10
+#define S_V_VD 800
+#define S_V_FP 13
+
+#define S_H_ST 440
+#define S_V_ST 13
+
+//1920*1080*50
+#define S1_OUT_CLK SCALE_RATE(148500000,57375000) //m=17 n=11 no=4
+#define S1_H_PW 10
+#define S1_H_BP 10
+#define S1_H_VD 1280
+#define S1_H_FP 77
+
+#define S1_V_PW 10
+#define S1_V_BP 10
+#define S1_V_VD 800
+#define S1_V_FP 13
+
+#define S1_H_ST 459
+#define S1_V_ST 13
+
+//1280*720*60
+#define S2_OUT_CLK SCALE_RATE(74250000,66000000) //m=32 n=9 no=4
+#define S2_H_PW 10
+#define S2_H_BP 10
+#define S2_H_VD 1280
+#define S2_H_FP 20
+
+#define S2_V_PW 10
+#define S2_V_BP 10
+#define S2_V_VD 800
+#define S2_V_FP 13
+
+#define S2_H_ST 440
+#define S2_V_ST 13
+
+//1280*720*50
+
+#define S3_OUT_CLK SCALE_RATE(74250000,57375000) // m=34 n=11 no=4
+#define S3_H_PW 10
+#define S3_H_BP 10
+#define S3_H_VD 1280
+#define S3_H_FP 77
+
+#define S3_V_PW 10
+#define S3_V_BP 10
+#define S3_V_VD 800
+#define S3_V_FP 13
+
+#define S3_H_ST 459
+#define S3_V_ST 13
+
+//720*576*50
+#define S4_OUT_CLK SCALE_RATE(27000000,63281250) //m=75 n=4 no=8
+#define S4_H_PW 10
+#define S4_H_BP 10
+#define S4_H_VD 1280
+#define S4_H_FP 185
+
+#define S4_V_PW 10
+#define S4_V_BP 10
+#define S4_V_VD 800
+#define S4_V_FP 48
+
+#define S4_H_ST 81
+#define S4_V_ST 48
+
+//720*480*60
+#define S5_OUT_CLK SCALE_RATE(27000000,75000000) //m=100 n=9 no=4
+#define S5_H_PW 10
+#define S5_H_BP 10
+#define S5_H_VD 1280
+#define S5_H_FP 130
+
+#define S5_V_PW 10
+#define S5_V_BP 10
+#define S5_V_VD 800
+#define S5_V_FP 54
+
+#define S5_H_ST 476
+#define S5_V_ST 48
+
+#define S_DCLK_POL 0
+
+/* Other */
+#define DCLK_POL 0
+#define DEN_POL 0
+#define VSYNC_POL 0
+#define HSYNC_POL 0
+
+#define SWAP_RB 0
+#define SWAP_RG 0
+#define SWAP_GB 0
+
+
+#if ( defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) ) || defined(CONFIG_HDMI_DUAL_DISP)
+static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution)
+{
+ screen->s_clk_inv = S_DCLK_POL;
+ screen->s_den_inv = 0;
+ screen->s_hv_sync_inv = 0;
+ switch(hdmi_resolution){
+ case HDMI_1920x1080p_60Hz:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S_OUT_CLK;
+ screen->s_hsync_len = S_H_PW;
+ screen->s_left_margin = S_H_BP;
+ screen->s_right_margin = S_H_FP;
+ screen->s_hsync_len = S_H_PW;
+ screen->s_upper_margin = S_V_BP;
+ screen->s_lower_margin = S_V_FP;
+ screen->s_vsync_len = S_V_PW;
+ screen->s_hsync_st = S_H_ST;
+ screen->s_vsync_st = S_V_ST;
+ break;
+ case HDMI_1920x1080p_50Hz:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S1_OUT_CLK;
+ screen->s_hsync_len = S1_H_PW;
+ screen->s_left_margin = S1_H_BP;
+ screen->s_right_margin = S1_H_FP;
+ screen->s_hsync_len = S1_H_PW;
+ screen->s_upper_margin = S1_V_BP;
+ screen->s_lower_margin = S1_V_FP;
+ screen->s_vsync_len = S1_V_PW;
+ screen->s_hsync_st = S1_H_ST;
+ screen->s_vsync_st = S1_V_ST;
+ break;
+ case HDMI_1280x720p_60Hz:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S2_OUT_CLK;
+ screen->s_hsync_len = S2_H_PW;
+ screen->s_left_margin = S2_H_BP;
+ screen->s_right_margin = S2_H_FP;
+ screen->s_hsync_len = S2_H_PW;
+ screen->s_upper_margin = S2_V_BP;
+ screen->s_lower_margin = S2_V_FP;
+ screen->s_vsync_len = S2_V_PW;
+ screen->s_hsync_st = S2_H_ST;
+ screen->s_vsync_st = S2_V_ST;
+ break;
+ case HDMI_1280x720p_50Hz:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S3_OUT_CLK;
+ screen->s_hsync_len = S3_H_PW;
+ screen->s_left_margin = S3_H_BP;
+ screen->s_right_margin = S3_H_FP;
+ screen->s_hsync_len = S3_H_PW;
+ screen->s_upper_margin = S3_V_BP;
+ screen->s_lower_margin = S3_V_FP;
+ screen->s_vsync_len = S3_V_PW;
+ screen->s_hsync_st = S3_H_ST;
+ screen->s_vsync_st = S3_V_ST;
+ break;
+ case HDMI_720x576p_50Hz_4_3:
+ case HDMI_720x576p_50Hz_16_9:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S4_OUT_CLK;
+ screen->s_hsync_len = S4_H_PW;
+ screen->s_left_margin = S4_H_BP;
+ screen->s_right_margin = S4_H_FP;
+ screen->s_hsync_len = S4_H_PW;
+ screen->s_upper_margin = S4_V_BP;
+ screen->s_lower_margin = S4_V_FP;
+ screen->s_vsync_len = S4_V_PW;
+ screen->s_hsync_st = S4_H_ST;
+ screen->s_vsync_st = S4_V_ST;
+ break;
+ case HDMI_720x480p_60Hz_16_9:
+ case HDMI_720x480p_60Hz_4_3:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S5_OUT_CLK;
+ screen->s_hsync_len = S5_H_PW;
+ screen->s_left_margin = S5_H_BP;
+ screen->s_right_margin = S5_H_FP;
+ screen->s_hsync_len = S5_H_PW;
+ screen->s_upper_margin = S5_V_BP;
+ screen->s_lower_margin = S5_V_FP;
+ screen->s_vsync_len = S5_V_PW;
+ screen->s_hsync_st = S5_H_ST;
+ screen->s_vsync_st = S5_V_ST;
+ break;
+ default :
+ printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution);
+ return -1;
+ break;
+ }
+
+ return 0;
+}
+#else
+static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){return 0;}
+#endif
+void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info )
+{
+ /* screen type & face */
+ screen->type = OUT_TYPE;
+ screen->face = OUT_FACE;
+ screen->hw_format = OUT_FORMAT;
+
+ /* Screen size */
+ screen->x_res = H_VD;
+ screen->y_res = V_VD;
+
+ screen->width = LCD_WIDTH;
+ screen->height = LCD_HEIGHT;
+
+ /* Timing */
+ screen->lcdc_aclk = LCDC_ACLK;
+ screen->pixclock = OUT_CLK;
+ screen->left_margin = H_BP;
+ screen->right_margin = H_FP;
+ screen->hsync_len = H_PW;
+ screen->upper_margin = V_BP;
+ screen->lower_margin = V_FP;
+ screen->vsync_len = V_PW;
+
+ /* Pin polarity */
+ screen->pin_hsync = HSYNC_POL;
+ screen->pin_vsync = VSYNC_POL;
+ screen->pin_den = DEN_POL;
+ screen->pin_dclk = DCLK_POL;
+
+ /* Swap rule */
+ screen->swap_rb = SWAP_RB;
+ screen->swap_rg = SWAP_RG;
+ screen->swap_gb = SWAP_GB;
+ screen->swap_delta = 0;
+ screen->swap_dumy = 0;
+
+ /* Operation function*/
+ screen->init = NULL;
+ screen->standby = NULL;
+ screen->sscreen_get = set_scaler_info;
+#ifdef CONFIG_RK610_LVDS
+ screen->sscreen_set = rk610_lcd_scaler_set_param;
+#endif
+}
+
+
+size_t get_fb_size(void)
+{
+ size_t size = 0;
+ #if defined(CONFIG_THREE_FB_BUFFER)
+ size = ((H_VD)*(V_VD)<<2)* 3; //three buffer
+ #else
+ size = ((H_VD)*(V_VD)<<2)<<1; //two buffer
+ #endif
+ return ALIGN(size,SZ_1M);
+}
+
-#include <linux/fb.h>
#include <linux/delay.h>
#include <mach/gpio.h>
#include <mach/iomux.h>
#include <mach/board.h>
-#include "screen.h"
-#include <linux/hdmi.h>
-#include "../../rk29_fb.h"
+#if defined(CONFIG_RK_HDMI)
+#include "../../rockchip/hdmi/rk_hdmi.h"
+#endif
+#ifdef CONFIG_RK610_LVDS
#include "../transmitter/rk610_lcd.h"
+#endif
+
/* Base */
#define OUT_TYPE SCREEN_RGB
#define S_DCLK_POL 0
/* Other */
-#define DCLK_POL 0
-#define SWAP_RB 0
+#define DCLK_POL 0
+#define DEN_POL 0
+#define VSYNC_POL 0
+#define HSYNC_POL 0
+
+#define SWAP_RB 0
+#define SWAP_RG 0
+#define SWAP_GB 0
+
#if ( defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& defined(CONFIG_RK610_LVDS) ) || defined(CONFIG_HDMI_DUAL_DISP)
static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution)
{
- screen->s_clk_inv = S_DCLK_POL;
- screen->s_den_inv = 0;
- screen->s_hv_sync_inv = 0;
- switch(hdmi_resolution){
- case HDMI_1920x1080p_60Hz:
- /* Scaler Timing */
- screen->hdmi_resolution = hdmi_resolution;
- screen->s_pixclock = S_OUT_CLK;
- screen->s_hsync_len = S_H_PW;
- screen->s_left_margin = S_H_BP;
- screen->s_right_margin = S_H_FP;
- screen->s_hsync_len = S_H_PW;
- screen->s_upper_margin = S_V_BP;
- screen->s_lower_margin = S_V_FP;
- screen->s_vsync_len = S_V_PW;
- screen->s_hsync_st = S_H_ST;
- screen->s_vsync_st = S_V_ST;
- break;
+ screen->s_clk_inv = S_DCLK_POL;
+ screen->s_den_inv = 0;
+ screen->s_hv_sync_inv = 0;
+ switch(hdmi_resolution){
+ case HDMI_1920x1080p_60Hz:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S_OUT_CLK;
+ screen->s_hsync_len = S_H_PW;
+ screen->s_left_margin = S_H_BP;
+ screen->s_right_margin = S_H_FP;
+ screen->s_hsync_len = S_H_PW;
+ screen->s_upper_margin = S_V_BP;
+ screen->s_lower_margin = S_V_FP;
+ screen->s_vsync_len = S_V_PW;
+ screen->s_hsync_st = S_H_ST;
+ screen->s_vsync_st = S_V_ST;
+ break;
case HDMI_1920x1080p_50Hz:
- /* Scaler Timing */
- screen->hdmi_resolution = hdmi_resolution;
- screen->s_pixclock = S1_OUT_CLK;
- screen->s_hsync_len = S1_H_PW;
- screen->s_left_margin = S1_H_BP;
- screen->s_right_margin = S1_H_FP;
- screen->s_hsync_len = S1_H_PW;
- screen->s_upper_margin = S1_V_BP;
- screen->s_lower_margin = S1_V_FP;
- screen->s_vsync_len = S1_V_PW;
- screen->s_hsync_st = S1_H_ST;
- screen->s_vsync_st = S1_V_ST;
- break;
- case HDMI_1280x720p_60Hz:
- /* Scaler Timing */
- screen->hdmi_resolution = hdmi_resolution;
- screen->s_pixclock = S2_OUT_CLK;
- screen->s_hsync_len = S2_H_PW;
- screen->s_left_margin = S2_H_BP;
- screen->s_right_margin = S2_H_FP;
- screen->s_hsync_len = S2_H_PW;
- screen->s_upper_margin = S2_V_BP;
- screen->s_lower_margin = S2_V_FP;
- screen->s_vsync_len = S2_V_PW;
- screen->s_hsync_st = S2_H_ST;
- screen->s_vsync_st = S2_V_ST;
- break;
- case HDMI_1280x720p_50Hz:
- /* Scaler Timing */
- screen->hdmi_resolution = hdmi_resolution;
- screen->s_pixclock = S3_OUT_CLK;
- screen->s_hsync_len = S3_H_PW;
- screen->s_left_margin = S3_H_BP;
- screen->s_right_margin = S3_H_FP;
- screen->s_hsync_len = S3_H_PW;
- screen->s_upper_margin = S3_V_BP;
- screen->s_lower_margin = S3_V_FP;
- screen->s_vsync_len = S3_V_PW;
- screen->s_hsync_st = S3_H_ST;
- screen->s_vsync_st = S3_V_ST;
- break;
- case HDMI_720x576p_50Hz_4x3:
- case HDMI_720x576p_50Hz_16x9:
- /* Scaler Timing */
- screen->hdmi_resolution = hdmi_resolution;
- screen->s_pixclock = S4_OUT_CLK;
- screen->s_hsync_len = S4_H_PW;
- screen->s_left_margin = S4_H_BP;
- screen->s_right_margin = S4_H_FP;
- screen->s_hsync_len = S4_H_PW;
- screen->s_upper_margin = S4_V_BP;
- screen->s_lower_margin = S4_V_FP;
- screen->s_vsync_len = S4_V_PW;
- screen->s_hsync_st = S4_H_ST;
- screen->s_vsync_st = S4_V_ST;
- break;
- case HDMI_720x480p_60Hz_16x9:
- case HDMI_720x480p_60Hz_4x3:
- /* Scaler Timing */
- screen->hdmi_resolution = hdmi_resolution;
- screen->s_pixclock = S5_OUT_CLK;
- screen->s_hsync_len = S5_H_PW;
- screen->s_left_margin = S5_H_BP;
- screen->s_right_margin = S5_H_FP;
- screen->s_hsync_len = S5_H_PW;
- screen->s_upper_margin = S5_V_BP;
- screen->s_lower_margin = S5_V_FP;
- screen->s_vsync_len = S5_V_PW;
- screen->s_hsync_st = S5_H_ST;
- screen->s_vsync_st = S5_V_ST;
- break;
- default :
- printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution);
- return -1;
- break;
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S1_OUT_CLK;
+ screen->s_hsync_len = S1_H_PW;
+ screen->s_left_margin = S1_H_BP;
+ screen->s_right_margin = S1_H_FP;
+ screen->s_hsync_len = S1_H_PW;
+ screen->s_upper_margin = S1_V_BP;
+ screen->s_lower_margin = S1_V_FP;
+ screen->s_vsync_len = S1_V_PW;
+ screen->s_hsync_st = S1_H_ST;
+ screen->s_vsync_st = S1_V_ST;
+ break;
+ case HDMI_1280x720p_60Hz:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S2_OUT_CLK;
+ screen->s_hsync_len = S2_H_PW;
+ screen->s_left_margin = S2_H_BP;
+ screen->s_right_margin = S2_H_FP;
+ screen->s_hsync_len = S2_H_PW;
+ screen->s_upper_margin = S2_V_BP;
+ screen->s_lower_margin = S2_V_FP;
+ screen->s_vsync_len = S2_V_PW;
+ screen->s_hsync_st = S2_H_ST;
+ screen->s_vsync_st = S2_V_ST;
+ break;
+ case HDMI_1280x720p_50Hz:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S3_OUT_CLK;
+ screen->s_hsync_len = S3_H_PW;
+ screen->s_left_margin = S3_H_BP;
+ screen->s_right_margin = S3_H_FP;
+ screen->s_hsync_len = S3_H_PW;
+ screen->s_upper_margin = S3_V_BP;
+ screen->s_lower_margin = S3_V_FP;
+ screen->s_vsync_len = S3_V_PW;
+ screen->s_hsync_st = S3_H_ST;
+ screen->s_vsync_st = S3_V_ST;
+ break;
+ case HDMI_720x576p_50Hz_4_3:
+ case HDMI_720x576p_50Hz_16_9:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S4_OUT_CLK;
+ screen->s_hsync_len = S4_H_PW;
+ screen->s_left_margin = S4_H_BP;
+ screen->s_right_margin = S4_H_FP;
+ screen->s_hsync_len = S4_H_PW;
+ screen->s_upper_margin = S4_V_BP;
+ screen->s_lower_margin = S4_V_FP;
+ screen->s_vsync_len = S4_V_PW;
+ screen->s_hsync_st = S4_H_ST;
+ screen->s_vsync_st = S4_V_ST;
+ break;
+ case HDMI_720x480p_60Hz_16_9:
+ case HDMI_720x480p_60Hz_4_3:
+ /* Scaler Timing */
+ screen->hdmi_resolution = hdmi_resolution;
+ screen->s_pixclock = S5_OUT_CLK;
+ screen->s_hsync_len = S5_H_PW;
+ screen->s_left_margin = S5_H_BP;
+ screen->s_right_margin = S5_H_FP;
+ screen->s_hsync_len = S5_H_PW;
+ screen->s_upper_margin = S5_V_BP;
+ screen->s_lower_margin = S5_V_FP;
+ screen->s_vsync_len = S5_V_PW;
+ screen->s_hsync_st = S5_H_ST;
+ screen->s_vsync_st = S5_V_ST;
+ break;
+ default :
+ printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution);
+ return -1;
+ break;
}
return 0;
}
#else
-static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){}
+static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){return 0;}
#endif
void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info )
{
- /* screen type & face */
- screen->type = OUT_TYPE;
- screen->face = OUT_FACE;
+ /* screen type & face */
+ screen->type = OUT_TYPE;
+ screen->face = OUT_FACE;
- /* Screen size */
- screen->x_res = H_VD;
- screen->y_res = V_VD;
+ /* Screen size */
+ screen->x_res = H_VD;
+ screen->y_res = V_VD;
- screen->width = LCD_WIDTH;
- screen->height = LCD_HEIGHT;
+ screen->width = LCD_WIDTH;
+ screen->height = LCD_HEIGHT;
- /* Timing */
- screen->lcdc_aclk = LCDC_ACLK;
- screen->pixclock = OUT_CLK;
+ /* Timing */
+ screen->lcdc_aclk = LCDC_ACLK;
+ screen->pixclock = OUT_CLK;
screen->left_margin = H_BP;
screen->right_margin = H_FP;
screen->hsync_len = H_PW;
screen->upper_margin = V_BP;
screen->lower_margin = V_FP;
screen->vsync_len = V_PW;
-
+
/* Pin polarity */
- screen->pin_hsync = 0;
- screen->pin_vsync = 0;
- screen->pin_den = 0;
+ screen->pin_hsync = HSYNC_POL;
+ screen->pin_vsync = VSYNC_POL;
+ screen->pin_den = DEN_POL;
screen->pin_dclk = DCLK_POL;
/* Swap rule */
- screen->swap_rb = SWAP_RB;
- screen->swap_rg = 0;
- screen->swap_gb = 0;
- screen->swap_delta = 0;
- screen->swap_dumy = 0;
-
- /* Operation function*/
- screen->init = NULL;
- screen->standby = NULL;
- screen->sscreen_get = set_scaler_info;
+ screen->swap_rb = SWAP_RB;
+ screen->swap_rg = SWAP_RG;
+ screen->swap_gb = SWAP_GB;
+ screen->swap_delta = 0;
+ screen->swap_dumy = 0;
+
+ /* Operation function*/
+ screen->init = NULL;
+ screen->standby = NULL;
+ screen->sscreen_get = set_scaler_info;
#ifdef CONFIG_RK610_LVDS
screen->sscreen_set = rk610_lcd_scaler_set_param;
#endif
projects / firefly-linux-kernel-4.4.55.git / commitdiff