vop_mmu {
dbgname = "vop";
- compatible = "iommu,vop_mmu";
+ compatible = "rockchip,vop_mmu";
reg = <0x10118300 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vop_mmu";
hevc_mmu {
dbgname = "hevc";
- compatible = "iommu,hevc_mmu";
+ compatible = "rockchip,hevc_mmu";
reg = <0x1010c440 0x100>,
<0x1010c480 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
vpu_mmu {
dbgname = "vpu";
- compatible = "iommu,vpu_mmu";
+ compatible = "rockchip,vpu_mmu";
reg = <0x10108800 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vpu_mmu";
vop_mmu {
dbgname = "vop";
- compatible = "iommu,vop_mmu";
+ compatible = "rockchip,vop_mmu";
reg = <0x1010e300 0x100>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vop_mmu";
hevc_mmu {
dbgname = "hevc";
- compatible = "iommu,hevc_mmu";
+ compatible = "rockchip,hevc_mmu";
reg = <0x10104440 0x100>,
<0x10104480 0x100>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
vpu_mmu {
dbgname = "vpu";
- compatible = "iommu,vpu_mmu";
+ compatible = "rockchip,vpu_mmu";
reg = <0x10104800 0x100>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vpu_mmu";
iep_mmu {
dbgname = "iep";
- compatible = "iommu,iep_mmu";
+ compatible = "rockchip,iep_mmu";
reg = <0x10108800 0x100>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "iep_mmu";