return;
rc_ = mri_.getRegClass(edit.getReg());
- stackSlot_ = edit.assignStackSlot(vrm_);
+ stackSlot_ = vrm_.assignVirt2StackSlot(edit_->getReg());
// Update LiveStacks now that we are committed to spilling.
LiveInterval &stacklvr = lss_.getOrCreateInterval(stackSlot_, rc_);
- if (!stacklvr.hasAtLeastOneValue())
- stacklvr.getNextValue(SlotIndex(), 0, lss_.getVNInfoAllocator());
+ assert(stacklvr.empty() && "Just created stack slot not empty");
+ stacklvr.getNextValue(SlotIndex(), 0, lss_.getVNInfoAllocator());
stacklvr.MergeRangesInAsValue(edit_->getParent(), stacklvr.getValNumInfo(0));
// Iterate over instructions using register.
using namespace llvm;
-int LiveRangeEdit::assignStackSlot(VirtRegMap &vrm) {
- int ss = vrm.getStackSlot(getReg());
- if (ss != VirtRegMap::NO_STACK_SLOT)
- return ss;
- return vrm.assignVirt2StackSlot(getReg());
-}
-
LiveInterval &LiveRangeEdit::create(MachineRegisterInfo &mri,
LiveIntervals &lis,
VirtRegMap &vrm) {
const TargetRegisterClass *RC = mri.getRegClass(parent_.reg);
unsigned VReg = mri.createVirtualRegister(RC);
vrm.grow();
- // Immediately assign to the same stack slot as parent.
- vrm.assignVirt2StackSlot(VReg, assignStackSlot(vrm));
LiveInterval &li = lis.getOrCreateInterval(VReg);
newRegs_.push_back(&li);
return li;
unsigned size() const { return newRegs_.size()-firstNew_; }
LiveInterval *get(unsigned idx) const { return newRegs_[idx+firstNew_]; }
- /// assignStackSlot - Ensure a stack slot is assigned to parent.
- /// @return the assigned stack slot number.
- int assignStackSlot(VirtRegMap&);
-
/// create - Create a new register with the same class and stack slot as
/// parent.
LiveInterval &create(MachineRegisterInfo&, LiveIntervals&, VirtRegMap&);