#address-cells = <1>;
#size-cells = <1>;
+ edp_phy: edp-phy {
+ compatible = "rockchip,rk3368-dp-phy";
+ clocks = <&cru SCLK_EDP_24M>;
+ clock-names = "24m";
+ resets = <&cru SRST_EDP_24M>;
+ reset-names = "edp_24m";
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
io_domains: io-domains {
compatible = "rockchip,rk3368-io-voltage-domain";
status = "disabled";
reg = <0>;
remote-endpoint = <&mipi_in_vop>;
};
+
+ vop_out_edp: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&edp_in_vop>;
+ };
};
};
status = "disabled";
};
+ edp: edp@ff970000 {
+ compatible = "rockchip,rk3368-edp";
+ reg = <0x0 0xff970000 0x0 0x8000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>;
+ clock-names = "dp", "pclk";
+ resets = <&cru SRST_EDP>;
+ reset-names = "dp";
+ power-domains = <&power RK3368_PD_VIO>;
+ rockchip,grf = <&grf>;
+ phys = <&edp_phy>;
+ phy-names = "dp";
+ pinctrl-names = "default";
+ pinctrl-0 = <&edp_hpd>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ edp_in: port@0 {
+ reg = <0>;
+
+ edp_in_vop: endpoint {
+ remote-endpoint = <&vop_out_edp>;
+ };
+ };
+ };
+ };
+
hevc_mmu: iommu@ff9a0440 {
compatible = "rockchip,iommu";
reg = <0x0 0xff9a0440 0x0 0x40>,
drive-strength = <12>;
};
+ edp {
+ edp_hpd: edp-hpd {
+ rockchip,pins = <2 23 RK_FUNC_2 &pcfg_pull_none>;
+ };
+ };
+
emmc {
emmc_clk: emmc-clk {
rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;