CHROMIUM: drm: bridge/dw_hdmi: fix i2cm standard mode setting error
authorYakir Yang <ykk@rock-chips.com>
Mon, 28 Sep 2015 08:58:24 +0000 (16:58 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Tue, 16 Aug 2016 06:33:28 +0000 (14:33 +0800)
I have uploaded a patch to switch DDC to standard mode in
(https://chromium-review.googlesource.com/298270), but that change
have influence the "spare register" in I2CM_DIV, I know this haven't
cause some know bug, but we need to fix it.

BUG=chrome-os-partner:34741
TEST=None

Change-Id: Iff678fb49828db9b8026422e302a03f687a7c862
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/302751
Commit-Ready: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
drivers/gpu/drm/bridge/dw-hdmi.c
drivers/gpu/drm/bridge/dw-hdmi.h

index 502c8355cdc08d28600d22f83eb67da67d4cb1f8..be0e1a3959e7c8fd4c09f9540024538468670edf 100644 (file)
@@ -275,7 +275,8 @@ static void dw_hdmi_i2c_init(struct dw_hdmi *hdmi)
        hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
 
        /* Set Standard Mode speed */
-       hdmi_writeb(hdmi, 0x03, HDMI_I2CM_DIV);
+       hdmi_modb(hdmi, HDMI_I2CM_DIV_STD_MODE,
+                 HDMI_I2CM_DIV_FAST_STD_MODE, HDMI_I2CM_DIV);
 
        /* Set done, not acknowledged and arbitration interrupt polarities */
        hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
index c88e59b6376fde6790382c74d2a7e40cdaf0fdab..92c41d776891ff000411a4498375004f7578acba 100644 (file)
@@ -1076,6 +1076,11 @@ enum {
        HDMI_I2CM_CTLINT_NAC_MASK = 0x40,
        HDMI_I2CM_CTLINT_ARB_POL = 0x8,
        HDMI_I2CM_CTLINT_ARB_MASK = 0x4,
+
+/* I2CM_DIV field values */
+       HDMI_I2CM_DIV_FAST_STD_MODE = 0x8,
+       HDMI_I2CM_DIV_FAST_MODE = 0x8,
+       HDMI_I2CM_DIV_STD_MODE = 0,
 };
 
 #endif /* __DW_HDMI_H__ */