UPSTREAM: usb: dwc2: Avoid more calls to dwc2_core_reset()

Calls to dwc2_core_reset() are currently very slow, taking at least
150ms (possibly more).  It behooves us to take as many of these calls
out as possible.

It turns out that the calls in dwc2_fs_phy_init() and dwc2_hs_phy_init()
should (as documented in the code) only be needed if we need to do a PHY
SELECT.  That means that if we see that we can avoid the PHY SELECT then
we can avoid the reset.

This patch appears to successfully bypass two resets (one per USB
device) on rk3288-based ARM Chromebooks.

Change-Id: If9f7275d61af6fd8558124ff9ebc7c3622c1f4a3
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
(cherry picked from commit 7d56cc2620f523eba7a831daa22186c8ae5bbdfe)

diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index d5813c184325d563a5539a6920760f2c550c4d35..60822bc967ddc8d3097f0a884a30ff5ea5e3241e 100644 (file)
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -553,16 +553,20 @@ static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
         */
        if (select_phy) {
                dev_dbg(hsotg->dev, "FS PHY selected\n");
+
                usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
-               usbcfg |= GUSBCFG_PHYSEL;
-               dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
+               if (!(usbcfg & GUSBCFG_PHYSEL)) {
+                       usbcfg |= GUSBCFG_PHYSEL;
+                       dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
 
-               /* Reset after a PHY select */
-               retval = dwc2_core_reset(hsotg);
-               if (retval) {
-                       dev_err(hsotg->dev, "%s() Reset failed, aborting",
-                                       __func__);
-                       return retval;
+                       /* Reset after a PHY select */
+                       retval = dwc2_core_reset(hsotg);
+
+                       if (retval) {
+                               dev_err(hsotg->dev,
+                                       "%s: Reset failed, aborting", __func__);
+                               return retval;
+                       }
                }
        }
 
@@ -597,13 +601,13 @@ static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
 
 static int dwc2_hs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
 {
-       u32 usbcfg;
+       u32 usbcfg, usbcfg_old;
        int retval = 0;
 
        if (!select_phy)
                return 0;
 
-       usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
+       usbcfg = usbcfg_old = dwc2_readl(hsotg->regs + GUSBCFG);
 
        /*
         * HS PHY parameters. These parameters are preserved during soft reset
@@ -631,14 +635,16 @@ static int dwc2_hs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
                break;
        }
 
-       dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
+       if (usbcfg != usbcfg_old) {
+               dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
 
-       /* Reset after setting the PHY parameters */
-       retval = dwc2_core_reset(hsotg);
-       if (retval) {
-               dev_err(hsotg->dev, "%s() Reset failed, aborting",
-                               __func__);
-               return retval;
+               /* Reset after setting the PHY parameters */
+               retval = dwc2_core_reset(hsotg);
+               if (retval) {
+                       dev_err(hsotg->dev,
+                               "%s: Reset failed, aborting", __func__);
+                       return retval;
+               }
        }
 
        return retval;