ARM: rockchip: fix rk3288 tsadc_int pinctrl

diff --git a/arch/arm/boot/dts/rk3288-pinctrl.dtsi b/arch/arm/boot/dts/rk3288-pinctrl.dtsi
index b5113f0ceb26a6dfe4676368985fd2059cfa272d..85982b9a5bbd4d40f3b6600e4b9df59504a57070 100755 (executable)
--- a/arch/arm/boot/dts/rk3288-pinctrl.dtsi
+++ b/arch/arm/boot/dts/rk3288-pinctrl.dtsi
@@ -941,6 +941,12 @@
                        };
                };
 
+               gpio0_tsadc: gpio0-tsadc {
+                       tsadc_int: tsadc-int {
+                               rockchip,pins = <TSADC_INT>;
+                               rockchip,pull = <VALUE_PULL_DISABLE>;
+                       };
+               };
                //to add
 
 

diff --git a/include/dt-bindings/pinctrl/rockchip-rk3288.h b/include/dt-bindings/pinctrl/rockchip-rk3288.h
index 21e284f32896e15b2aa27ca5c3de222c10f63845..97aa66e2b329846b2e148a963bade8569aa651ef 100755 (executable)
--- a/include/dt-bindings/pinctrl/rockchip-rk3288.h
+++ b/include/dt-bindings/pinctrl/rockchip-rk3288.h
@@ -31,18 +31,31 @@
 #define GPIO0_A3 0x0a30
 #define DDR1_RETENTION 0x0a31
 
+#define GPIO0_A4 0x0a40
+
+#define GPIO0_A5 0x0a50
+
+#define GPIO0_A6 0x0a60
+
+#define GPIO0_A7 0x0a70
 
 /* GPIO0_B */
 #define GPIO0_B0 0x0b00
-#define TSADC_INT 0x0b01
+
+#define GPIO0_B1 0x0b10
 
 #define GPIO0_B2 0x0b20
-#define OTP_OUT 0x0b21
+#define TSADC_INT 0x0b21
+
+#define GPIO0_B3 0x0b30
 
+#define GPIO0_B4 0x0b40
 
 #define GPIO0_B5 0x0b50
 #define CLK_27M 0x0b51
 
+#define GPIO0_B6 0x0b60
+
 #define GPIO0_B7 0x0b70
 #define I2C0PMU_SDA 0x0b71