*pGRF_GPIO2L_IOMUX &= ~(0x3<<6);\r
// set gpio to input\r
*pGPIO2_DIR &= ~(0x1<<3);\r
-// testflag =1;\r
+\r
+ memset(RK29_PWM_BASE, 0, 0x40);\r
} \r
\r
\r
{\r
u32 reg;\r
\r
- /* from panic? */\r
- if (system_state != SYSTEM_RESTART)\r
- machine_power_off();\r
-\r
local_irq_disable();\r
local_fiq_disable();\r
- pwm2gpiodefault();\r
\r
cru_writel((cru_readl(CRU_MODE_CON) & ~CRU_CPU_MODE_MASK) | CRU_CPU_MODE_SLOW, CRU_MODE_CON);\r
-\r
delay_500ns();\r
\r
- cru_writel((cru_readl(CRU_MODE_CON) & ~CRU_GENERAL_MODE_MASK) | CRU_GENERAL_MODE_SLOW, CRU_MODE_CON);\r
+ /* from panic? */\r
+ if (system_state != SYSTEM_RESTART)\r
+ machine_power_off();\r
\r
+ pwm2gpiodefault();\r
+\r
+ cru_writel((cru_readl(CRU_MODE_CON) & ~CRU_GENERAL_MODE_MASK) | CRU_GENERAL_MODE_SLOW, CRU_MODE_CON);\r
delay_500ns();\r
\r
cru_writel((cru_readl(CRU_MODE_CON) & ~CRU_CODEC_MODE_MASK) | CRU_CODEC_MODE_SLOW, CRU_MODE_CON);\r
-\r
delay_500ns();\r
\r
cru_writel(0, CRU_CLKGATE0_CON);\r