rk3168: defconfig open ddr freq
authorhjc <hjc@rock-chips.com>
Wed, 27 Mar 2013 13:42:20 +0000 (21:42 +0800)
committerhjc <hjc@rock-chips.com>
Wed, 27 Mar 2013 13:42:20 +0000 (21:42 +0800)
arch/arm/configs/rk3168_86v_defconfig
arch/arm/configs/rk3168_ds803f_defconfig

index 5225f9fe231375351508760b16c0b4053a4ab87d..24be9e926567735f03827d930b72a2e5f0058491 100644 (file)
@@ -23,7 +23,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_ARCH_RK30=y
 CONFIG_DDR_INIT_CHANGE_FREQ=y
 CONFIG_DDR_SDRAM_FREQ=300
-# CONFIG_DDR_FREQ is not set
 # CONFIG_DDR_TEST is not set
 CONFIG_RK_CLOCK_PROC=y
 CONFIG_CLK_SWITCH_TO_32K=y
@@ -311,7 +310,6 @@ CONFIG_SND=y
 # CONFIG_SND_ARM is not set
 CONFIG_SND_SOC=y
 CONFIG_SND_RK29_SOC=y
-CONFIG_SND_RK29_SOC_I2S_2CH=y
 CONFIG_SND_I2S_DMA_EVENT_STATIC=y
 CONFIG_SND_RK29_SOC_RK610=y
 CONFIG_SND_RK29_CODEC_SOC_SLAVE=y
index 314ed280d07ad8db492e20fef7c76ed4aff15cb6..082257431b888c420f6f0ec3fac86231db059495 100644 (file)
@@ -23,7 +23,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_ARCH_RK30=y
 CONFIG_DDR_INIT_CHANGE_FREQ=y
 CONFIG_DDR_SDRAM_FREQ=300
-# CONFIG_DDR_FREQ is not set
 # CONFIG_DDR_TEST is not set
 CONFIG_RK_CLOCK_PROC=y
 CONFIG_CLK_SWITCH_TO_32K=y
@@ -322,7 +321,6 @@ CONFIG_SND=y
 # CONFIG_SND_ARM is not set
 CONFIG_SND_SOC=y
 CONFIG_SND_RK29_SOC=y
-CONFIG_SND_RK29_SOC_I2S_2CH=y
 CONFIG_SND_I2S_DMA_EVENT_STATIC=y
 CONFIG_SND_RK29_SOC_ES8323=y
 CONFIG_SND_RK29_CODEC_SOC_SLAVE=y