usb: dwc2: add external_id_pin_ctl core parameter
authorGregory Herrero <gregory.herrero@intel.com>
Wed, 29 Apr 2015 20:09:04 +0000 (22:09 +0200)
committerFelipe Balbi <balbi@ti.com>
Wed, 29 Apr 2015 20:18:55 +0000 (15:18 -0500)
This is required due to an Intel specific hardware issue. Where id-
pin setup causes glitches on the interrupt line when CONIDSTSCHG
interrupt is enabled.

Specify external_id_pin_ctl when an external driver (for example phy)
can handle id change, so that CONIDSTSCHG interrupt can be disabled
from the controller.

Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Gregory Herrero <gregory.herrero@intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
drivers/usb/dwc2/core.c
drivers/usb/dwc2/core.h
drivers/usb/dwc2/platform.c

index 889dc5fad47c9ce41d21fdb09a268a11f9935285..8c3bc84e6e761d9b0176db0db7559ed6ab5bbdb2 100644 (file)
@@ -454,8 +454,10 @@ static void dwc2_enable_common_interrupts(struct dwc2_hsotg *hsotg)
 
        if (hsotg->core_params->dma_enable <= 0)
                intmsk |= GINTSTS_RXFLVL;
+       if (hsotg->core_params->external_id_pin_ctl <= 0)
+               intmsk |= GINTSTS_CONIDSTSCHNG;
 
-       intmsk |= GINTSTS_CONIDSTSCHNG | GINTSTS_WKUPINT | GINTSTS_USBSUSP |
+       intmsk |= GINTSTS_WKUPINT | GINTSTS_USBSUSP |
                  GINTSTS_SESSREQINT;
 
        writel(intmsk, hsotg->regs + GINTMSK);
@@ -2979,6 +2981,23 @@ static void dwc2_set_param_uframe_sched(struct dwc2_hsotg *hsotg, int val)
        hsotg->core_params->uframe_sched = val;
 }
 
+static void dwc2_set_param_external_id_pin_ctl(struct dwc2_hsotg *hsotg,
+               int val)
+{
+       if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
+               if (val >= 0) {
+                       dev_err(hsotg->dev,
+                               "'%d' invalid for parameter external_id_pin_ctl\n",
+                               val);
+                       dev_err(hsotg->dev, "external_id_pin_ctl must be 0 or 1\n");
+               }
+               val = 0;
+               dev_dbg(hsotg->dev, "Setting external_id_pin_ctl to %d\n", val);
+       }
+
+       hsotg->core_params->external_id_pin_ctl = val;
+}
+
 /*
  * This function is called during module intialization to pass module parameters
  * for the DWC_otg core.
@@ -3023,6 +3042,7 @@ void dwc2_set_parameters(struct dwc2_hsotg *hsotg,
        dwc2_set_param_ahbcfg(hsotg, params->ahbcfg);
        dwc2_set_param_otg_ver(hsotg, params->otg_ver);
        dwc2_set_param_uframe_sched(hsotg, params->uframe_sched);
+       dwc2_set_param_external_id_pin_ctl(hsotg, params->external_id_pin_ctl);
 }
 
 /**
index e6abc28dd6bff6214e39563d2093d1ad6113a8fe..e46304df160f17aac3be6229c8a7c442dd49437c 100644 (file)
@@ -331,6 +331,11 @@ enum dwc2_ep0_state {
  *                      by the driver and are ignored in this
  *                      configuration value.
  * @uframe_sched:       True to enable the microframe scheduler
+ * @external_id_pin_ctl: Specifies whether ID pin is handled externally.
+ *                      Disable CONIDSTSCHNG controller interrupt in such
+ *                      case.
+ *                      0 - No (default)
+ *                      1 - Yes
  *
  * The following parameters may be specified when starting the module. These
  * parameters define how the DWC_otg controller should be configured. A
@@ -368,6 +373,7 @@ struct dwc2_core_params {
        int reload_ctl;
        int ahbcfg;
        int uframe_sched;
+       int external_id_pin_ctl;
 };
 
 /**
index 4fb058b03eaf0e8645e87d45da9ab3ac26893cc2..ce39e8a018440881e164c6adf80813f212866f9e 100644 (file)
@@ -77,6 +77,7 @@ static const struct dwc2_core_params params_bcm2835 = {
        .reload_ctl                     = 0,
        .ahbcfg                         = 0x10,
        .uframe_sched                   = 0,
+       .external_id_pin_ctl            = -1,
 };
 
 static const struct dwc2_core_params params_rk3066 = {
@@ -105,6 +106,7 @@ static const struct dwc2_core_params params_rk3066 = {
        .reload_ctl                     = -1,
        .ahbcfg                         = 0x7, /* INCR16 */
        .uframe_sched                   = -1,
+       .external_id_pin_ctl            = -1,
 };
 
 /**