Add an option to disable spill fusing in the X86 backend

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11531 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index b3d9bb2ab83eb8a9017790398640e087b5f3b6be..dae171f8af83cdfbb3ae4ea0a4d8b7e7fdfe7060 100644 (file)
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -31,6 +31,9 @@ namespace {
   cl::opt<bool>
   NoFPElim("disable-fp-elim",
           cl::desc("Disable frame pointer elimination optimization"));
+  cl::opt<bool>
+  NoFusing("disable-spill-fusing",
+           cl::desc("Disable fusing of spill code into instructions"));
 }
 
 X86RegisterInfo::X86RegisterInfo()
@@ -106,6 +109,8 @@ static MachineInstr *MakeRMIInst(unsigned Opcode, unsigned FrameIndex,
 
 bool X86RegisterInfo::foldMemoryOperand(MachineBasicBlock::iterator &MI,
                                         unsigned i, int FrameIndex) const {
+  if (NoFusing) return false;
+
   /// FIXME: This should obviously be autogenerated by tablegen when patterns
   /// are available!
   MachineBasicBlock& MBB = *MI->getParent();