ARM: fix thumb coprocessor instruction with pre-writeback disassembly

was        stc2 p0, c0, [r0]!
instead of stc2 p0, c0, [r0,#0]!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183975 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td
index ff21bf70ecd320de8eb5826bfbe57586ec3cfc63..8b114a8326485caea17cfada8181642f3d8d663c 100644 (file)
--- a/lib/Target/ARM/ARMInstrThumb2.td
+++ b/lib/Target/ARM/ARMInstrThumb2.td
@@ -3632,7 +3632,7 @@ multiclass t2LdStCop<bits<4> op31_28, bit load, bit Dbit, string asm> {
     let DecoderMethod = "DecodeCopMemInstruction";
   }
   def _PRE : T2CI<op31_28,
-                  (outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr),
+                  (outs), (ins p_imm:$cop, c_imm:$CRd, addrmode5_pre:$addr),
                   asm, "\t$cop, $CRd, $addr!"> {
     bits<13> addr;
     bits<4> cop;

diff --git a/test/MC/Disassembler/ARM/thumb-tests.txt b/test/MC/Disassembler/ARM/thumb-tests.txt
index 757ce6e3977bd36d496ced2241883917bdda6818..84dd0753a69a429045a50a21bafc1c1e085e069b 100644 (file)
--- a/test/MC/Disassembler/ARM/thumb-tests.txt
+++ b/test/MC/Disassembler/ARM/thumb-tests.txt
@@ -221,6 +221,9 @@
 # CHECK:       stc2    p12, c15, [r9], {137}
 0x89 0xfc 0x89 0xfc
 
+# CHECK:       stc2    p0, c0, [r0, #0]!
+0xa0 0xfd 0x00 0x00
+
 # CHECK:       vmov    r1, r0, d11
 0x50 0xec 0x1b 0x1b