drm/i915: create VLV_DSIPLAY_BASE #define

Will be used more in the next patch.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index ab3b9d38e1530d2f22c64335d809056128c52351..ff569cc353766208c3c597d838e5c578d0a43a70 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1031,7 +1031,7 @@ static bool IS_DISPLAYREG(u32 reg)
         * This should make it easier to transition modules over to the
         * new register block scheme, since we can do it incrementally.
         */
-       if (reg >= 0x180000)
+       if (reg >= VLV_DISPLAY_BASE)
                return false;
 
        if (reg >= RENDER_RING_BASE &&

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0d1fa64b56dc2d9c6d99cd2e6302228a3d8f1990..d122c93643e6e9804000ff8361eab6a77d6fecb2 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -529,6 +529,8 @@
 #define   GFX_PSMI_GRANULARITY         (1<<10)
 #define   GFX_PPGTT_ENABLE             (1<<9)
 
+#define VLV_DISPLAY_BASE 0x180000
+
 #define SCPD0          0x0209c /* 915+ only */
 #define IER            0x020a0
 #define IIR            0x020a4