if (ICI.isSigned() != (Shr->getOpcode() == Instruction::AShr))
return 0;
- // Otherwise, all lshr and all exact ashr's are equivalent to a udiv/sdiv by
- // a power of 2. Since we already have logic to simplify these, transform
- // to div and then simplify the resultant comparison.
+ // Otherwise, all lshr and most exact ashr's are equivalent to a udiv/sdiv
+ // by a power of 2. Since we already have logic to simplify these,
+ // transform to div and then simplify the resultant comparison.
if (Shr->getOpcode() == Instruction::AShr &&
- !Shr->isExact())
+ (!Shr->isExact() || ShAmtVal == TypeBits - 1))
return 0;
// Revisit the shift (to delete it).
ret i1 %Z
}
+; PR9998
+; Make sure we don't transform the ashr here into an sdiv
+; CHECK: @pr9998
+; CHECK: = and i32 %V, 1
+; CHECK: %Z = icmp ne
+; CHECK: ret i1 %Z
+define i1 @pr9998(i32 %V) nounwind {
+entry:
+ %W = shl i32 %V, 31
+ %X = ashr exact i32 %W, 31
+ %Y = sext i32 %X to i64
+ %Z = icmp ugt i64 %Y, 7297771788697658747
+ ret i1 %Z
+}
+
+
; CHECK: @udiv_icmp1
; CHECK: icmp ne i64 %X, 0
define i1 @udiv_icmp1(i64 %X) nounwind {