.flags = 0,
},
#endif
+#if defined (CONFIG_SND_SOC_RT5631)
+ {
+ .type = "rt5631",
+ .addr = 0x1a,
+ .flags = 0,
+ },
+#endif
+
};
#endif
CLK1(i2s_pll),
- CLK("rk30_i2s.0", "i2s_div", &clk_i2s0_div),
- CLK("rk30_i2s.0", "i2s_frac_div", &clk_i2s0_frac_div),
- CLK("rk30_i2s.0", "i2s", &clk_i2s0),
- CLK("rk30_i2s.0", "hclk_i2s", &clk_hclk_i2s0_2ch),
-
- CLK("rk30_i2s.1", "i2s_div", &clk_i2s1_div),
- CLK("rk30_i2s.1", "i2s_frac_div", &clk_i2s1_frac_div),
- CLK("rk30_i2s.1", "i2s", &clk_i2s1),
- CLK("rk30_i2s.1", "hclk_i2s", &clk_hclk_i2s1_2ch),
-
- CLK("rk30_i2s.2", "i2s_div", &clk_i2s2_div),
- CLK("rk30_i2s.2", "i2s_frac_div", &clk_i2s2_frac_div),
- CLK("rk30_i2s.2", "i2s", &clk_i2s2),
- CLK("rk30_i2s.2", "hclk_i2s", &clk_hclk_i2s_8ch),
+ CLK("rk29_i2s.0", "i2s_div", &clk_i2s0_div),
+ CLK("rk29_i2s.0", "i2s_frac_div", &clk_i2s0_frac_div),
+ CLK("rk29_i2s.0", "i2s", &clk_i2s0),
+ CLK("rk29_i2s.0", "hclk_i2s", &clk_hclk_i2s0_2ch),
+
+ CLK("rk29_i2s.1", "i2s_div", &clk_i2s1_div),
+ CLK("rk29_i2s.1", "i2s_frac_div", &clk_i2s1_frac_div),
+ CLK("rk29_i2s.1", "i2s", &clk_i2s1),
+ CLK("rk29_i2s.1", "hclk_i2s", &clk_hclk_i2s1_2ch),
+
+ CLK("rk29_i2s.2", "i2s_div", &clk_i2s2_div),
+ CLK("rk29_i2s.2", "i2s_frac_div", &clk_i2s2_frac_div),
+ CLK("rk29_i2s.2", "i2s", &clk_i2s2),
+ CLK("rk29_i2s.2", "hclk_i2s", &clk_hclk_i2s_8ch),
CLK1(spdif_div),
CLK1(spdif_frac_div),
#endif
#ifdef CONFIG_SND_RK29_SOC_I2S
+#ifdef CONFIG_SND_RK29_SOC_I2S_8CH
static struct resource resource_iis0_8ch[] = {
[0] = {
.start = RK30_I2S0_8CH_PHYS,
.num_resources = ARRAY_SIZE(resource_iis0_8ch),
.resource = resource_iis0_8ch,
};
-
+#endif
+#ifdef CONFIG_SND_RK29_SOC_I2S_2CH
static struct resource resource_iis1_2ch[] = {
[0] = {
.start = RK30_I2S1_2CH_PHYS,
.num_resources = ARRAY_SIZE(resource_iis1_2ch),
.resource = resource_iis1_2ch,
};
-
+#endif
+#ifdef CONFIG_SND_RK_SOC_I2S2_2CH
static struct resource resource_iis2_2ch[] = {
[0] = {
.start = RK30_I2S2_2CH_PHYS,
.resource = resource_iis2_2ch,
};
#endif
+#endif
static struct platform_device device_pcm = {
.name = "rockchip-audio",
struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
unsigned int val;
int ret;
+
+ DBG("%s..............\n", __func__);
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
if (ret != 0) {
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
return ret;
}
- pr_info("RT5631 initial ok!\n");
+ DBG("RT5631 initial ok!\n");
return 0;
}
struct rt5631_priv *rt5631;
int ret;
- pr_info("RT5631 Audio Codec %s\n", RT5631_VERSION);
+ DBG("RT5631 Audio Codec %s\n", RT5631_VERSION);
rt5631 = kzalloc(sizeof(struct rt5631_priv), GFP_KERNEL);
if (NULL == rt5631)
#define I2S_MCLK_DIV(x) ((0xFF&x)<<16)
#define I2S_MCLK_DIV_MASK ((0xFF)<<16)
+ #define I2S_RX_SCLK_DIV(x) ((x&0xFF)<<8)
+ #define I2S_RX_SCLK_DIV_MASK ((0xFF)<<8)
+
#define I2S_TX_SCLK_DIV(x) (x&0xFF)
- #define I2S_TX_SCLK_DIV_MASK (0xFF);
+ #define I2S_TX_SCLK_DIV_MASK (0xFF)
#endif
/* I2S_DMACR */
else
{
//stop tx
-
flag_i2s_tx = 0;
if ((flag_i2s_rx == 0) && (flag_i2s_tx == 0))
{
I2S_DBG("Enter:%s, %d, i2s=0x%p, freq=%d\n", __FUNCTION__, __LINE__, i2s, freq);
/*add scu clk source and enable clk*/
-// clk_set_rate(i2s->iis_clk, freq);
+ clk_set_rate(i2s->iis_clk, freq);
return 0;
}
i2s = to_info(cpu_dai);
//stereo mode MCLK/SCK=4
-
reg = readl(&(pheadi2s->I2S_CKR));
I2S_DBG("Enter:%s, %d, div_id=0x%08X, div=0x%08X\n", __FUNCTION__, __LINE__, div_id, div);
case ROCKCHIP_DIV_BCLK:
reg &= ~I2S_TX_SCLK_DIV_MASK;
reg |= I2S_TX_SCLK_DIV(div);
+ reg &= ~I2S_RX_SCLK_DIV_MASK;
+ reg |= I2S_RX_SCLK_DIV(div);
break;
case ROCKCHIP_DIV_MCLK:
reg &= ~I2S_MCLK_DIV_MASK;
dev_err(dev, "cannot ioremap registers\n");
return -ENXIO;
}
-#if 0
- i2s->iis_pclk = clk_get(dev, "i2s");
+
+ i2s->iis_pclk = clk_get(dev, "hclk_i2s");
if (IS_ERR(i2s->iis_pclk)) {
dev_err(dev, "failed to get iis_clock\n");
iounmap(i2s->regs);
return -ENOENT;
}
-
clk_enable(i2s->iis_pclk);
-#endif
+
+
/* Mark ourselves as in TXRX mode so we can run through our cleanup
* process without warnings. */
rockchip_snd_txctrl(i2s, 0, true);
WARN_ON(rk29_dma_request(i2s->dma_playback->channel, i2s->dma_playback->client, NULL));
WARN_ON(rk29_dma_request(i2s->dma_capture->channel, i2s->dma_capture->client, NULL));
#endif
-#if 0
+
i2s->iis_clk = clk_get(&pdev->dev, "i2s");
I2S_DBG("Enter:%s, %d, iis_clk=%p\n", __FUNCTION__, __LINE__, i2s->iis_clk);
if (IS_ERR(i2s->iis_clk)) {
clk_enable(i2s->iis_clk);
clk_set_rate(i2s->iis_clk, 11289600);
-#endif
+
ret = rk29_i2s_probe(pdev, dai, i2s, 0);
if (ret)
goto err_clk;
{
#ifdef CONFIG_SND_RK29_SOC_I2S_8CH
struct rk29_i2s_info *i2s=&rk29_i2s[0];
-#elif CONFIG_SND_RK29_SOC_I2S_2CH
+#else
+#ifdef CONFIG_SND_RK29_SOC_I2S_2CH
struct rk29_i2s_info *i2s=&rk29_i2s[1];
#else
struct rk29_i2s_info *i2s=&rk29_i2s[2];
+#endif
#endif
printk("========Show I2S reg========\n");