x86: prevent C-states hang on AMD C1E enabled machines
authorThomas Gleixner <tglx@linutronix.de>
Mon, 22 Sep 2008 17:02:25 +0000 (19:02 +0200)
committerThomas Gleixner <tglx@linutronix.de>
Tue, 23 Sep 2008 09:38:53 +0000 (11:38 +0200)
Impact: System hang when AMD C1E machines switch into C2/C3

AMD C1E enabled systems do not work with normal ACPI C-states
even if the BIOS is advertising them. Limit the C-states to
C1 for the ACPI processor idle code.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
arch/x86/kernel/process.c
include/asm-x86/acpi.h
include/asm-x86/cpufeature.h

index 2e2247117f6e10a97fbaef02fe8dfac9676ea2c5..d8c2a299bfe51d774d3ce4e9027dc02b1ceb7472 100644 (file)
@@ -272,6 +272,7 @@ static void c1e_idle(void)
                        c1e_detected = 1;
                        mark_tsc_unstable("TSC halt in C1E");
                        printk(KERN_INFO "System has C1E enabled\n");
+                       set_cpu_cap(&boot_cpu_data, X86_FEATURE_AMDC1E);
                }
        }
 
index 635d764dc13e346e26dc6f27b8a45d5701a9c55b..35d1743b57ac733502f48c63676f313b8e7f61f3 100644 (file)
@@ -140,6 +140,8 @@ static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
            boot_cpu_data.x86_model <= 0x05 &&
            boot_cpu_data.x86_mask < 0x0A)
                return 1;
+       else if (boot_cpu_has(X86_FEATURE_AMDC1E))
+               return 1;
        else
                return max_cstate;
 }
index 9489283a4bcfbc6bbb4f9e8fd5c25dbb8ed547f8..cfcfb0a806bac0d6f591c272c3ad3f65c384d0fe 100644 (file)
@@ -81,6 +81,7 @@
 #define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */
 #define X86_FEATURE_11AP       (3*32+19) /* Bad local APIC aka 11AP */
 #define X86_FEATURE_NOPL       (3*32+20) /* The NOPL (0F 1F) instructions */
+#define X86_FEATURE_AMDC1E     (3*32+21) /* AMD C1E detected */
 
 /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
 #define X86_FEATURE_XMM3       (4*32+ 0) /* Streaming SIMD Extensions-3 */