ARM64: dts: rk3399: assign VOP parent and rate for ACLK/HCLK

Change-Id: Ifcce7764eb709386e40140c58299468ea835fd8c
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 93a437068d2148603e26ac306c6764b5da75ef11..6bd586efea293b6a2f54b53d196b40b3c424fd2f 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -874,6 +874,8 @@
                #clock-cells = <1>;
                #reset-cells = <1>;
                assigned-clocks =
+                       <&cru ACLK_VOP0>, <&cru HCLK_VOP0>,
+                       <&cru ACLK_VOP1>, <&cru HCLK_VOP1>,
                        <&cru ARMCLKL>, <&cru ARMCLKB>,
                        <&cru PLL_GPLL>, <&cru PLL_CPLL>,
                        <&cru PLL_NPLL>,
@@ -883,6 +885,8 @@
                        <&cru PCLK_PERILP0>,
                        <&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>;
                assigned-clock-rates =
+                        <400000000>,  <200000000>,
+                        <400000000>,  <200000000>,
                         <816000000>, <1008000000>,
                         <594000000>,  <800000000>,
                        <1000000000>,